From: Dinh Nguyen <dinguyen@kernel.org>
To: "Gerlach, Matthew" <matthew.gerlach@altera.com>,
mturquette@baylibre.com, sboyd@kernel.org,
richardcochran@gmail.com, linux-clk@vger.kernel.org,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>,
Teh Wen Ping <wen.ping.teh@intel.com>
Subject: Re: [PATCH v4 RESEND] clk: socfpga: agilex: add support for the Intel Agilex5
Date: Sun, 4 May 2025 17:16:39 -0500 [thread overview]
Message-ID: <260b6cc3-db8b-4b4c-a360-7bdd858943a8@kernel.org> (raw)
In-Reply-To: <fd295c8b-c5fd-4fda-b5d4-3c261d8dbfeb@altera.com>
On 5/4/25 16:34, Gerlach, Matthew wrote:
>
>
> On 4/17/2025 7:52 AM, Matthew Gerlach wrote:
>> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>>
>> Add support for Intel's SoCFPGA Agilex5 platform. The clock manager
>> driver for the Agilex5 is very similar to the Agilex platform, so
>> it is reusing most of the Agilex clock driver code.
>>
>> Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com>
>> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
>> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>> Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
>
> Is there any feedback on this patch?
>
I've applied it and sent a PR for 6.16.
Dinh
next prev parent reply other threads:[~2025-05-04 22:16 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-17 14:52 Matthew Gerlach
2025-05-04 21:34 ` Gerlach, Matthew
2025-05-04 22:16 ` Dinh Nguyen [this message]
2025-05-06 20:52 ` Stephen Boyd
2025-05-08 22:10 ` Matthew Gerlach
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