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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-32745900a2dsm2019828a91.4.2025.08.27.02.52.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 Aug 2025 02:52:15 -0700 (PDT) Message-ID: <2648f422-6bef-4336-bdda-2d1663bc2807@oss.qualcomm.com> Date: Wed, 27 Aug 2025 17:52:09 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/3] coresight: tpda: add logic to configure TPDA_SYNCR register To: James Clark , Jie Gan Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Suzuki K Poulose , Mike Leach , Alexander Shishkin , Tingwei Zhang References: <20250827042042.6786-1-jie.gan@oss.qualcomm.com> <20250827042042.6786-3-jie.gan@oss.qualcomm.com> <4ca657cf-1c8e-4d51-aba9-c894c32a23b3@linaro.org> Content-Language: en-US From: Jie Gan In-Reply-To: <4ca657cf-1c8e-4d51-aba9-c894c32a23b3@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=Z/vsHGRA c=1 sm=1 tr=0 ts=68aed551 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=EUspDBNiAAAA:8 a=fCV0n7f5gNrMv1PFtk0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODIzMDAzMyBTYWx0ZWRfX3ZAZUs9WDZ2q /KrUAdAHrKcpfwfc0WTC3iSvBaU2+hKruU0Z1nfbLoNevJ126vLRhcduSYrMmkF+Bex8xJzC0Yz SPhpTWbZjXxo1ZBXiBqPjPGqo3V4EczNc9exinxcfKdXtKwXS/C8GmPFjESzSGrXSRk8FL0bYe9 qRV00lMLO9YWESF6ZZCZDIuoKsMK+GFlR45UPchVUMnFgEBRT2LOahVL1K11+Is0DQ3Q3OBkM3L hMPVChT9WSt2s5l7DFGYDAC2k9G4mK9nTHnZP+Tam/2obdxofeIW+AzYew4TApZAQlyverqNPim HHIkxF7BVf1cBQyX/Zbss91AKNLPiY6laGh0Ja3v5dDwYFxaX5Iov9hAo8zEygc3F29V/QrRLrR Se7jml7W X-Proofpoint-GUID: boy7rdjv8D8GVn3CJT40lEr-bAKBakza X-Proofpoint-ORIG-GUID: boy7rdjv8D8GVn3CJT40lEr-bAKBakza X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-27_01,2025-08-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 malwarescore=0 phishscore=0 clxscore=1015 suspectscore=0 impostorscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508230033 On 8/27/2025 5:21 PM, James Clark wrote: > > > On 27/08/2025 5:20 am, Jie Gan wrote: >> From: Tao Zhang >> >> The TPDA_SYNCR register defines the frequency at which TPDA generates >> ASYNC packets, enabling userspace tools to accurately parse each valid >> packet. >> >> Signed-off-by: Tao Zhang >> Co-developed-by: Jie Gan >> Signed-off-by: Jie Gan >> --- >>   drivers/hwtracing/coresight/coresight-tpda.c | 7 +++++++ >>   drivers/hwtracing/coresight/coresight-tpda.h | 6 ++++++ >>   2 files changed, 13 insertions(+) >> >> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/ >> hwtracing/coresight/coresight-tpda.c >> index 647ab49a98d7..430f76c559f2 100644 >> --- a/drivers/hwtracing/coresight/coresight-tpda.c >> +++ b/drivers/hwtracing/coresight/coresight-tpda.c >> @@ -187,6 +187,13 @@ static void tpda_enable_pre_port(struct >> tpda_drvdata *drvdata) >>        */ >>       if (drvdata->trig_flag_ts) >>           writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR); >> + >> +    /* Program the counter value for TPDA_SYNCR */ >> +    val = readl_relaxed(drvdata->base + TPDA_SYNCR); >> +    /* Clear the mode */ >> +    val &= ~TPDA_SYNCR_MODE_CTRL; >> +    val |= FIELD_PREP(TPDA_SYNCR_COUNTER_MASK, >> TPDA_SYNCR_MAX_COUNTER_VAL); > > Just use the mask directly if you want to set all the bits. This makes > it seem like the MAX_COUNTER_VAL is something different. > You are right. will fix it. > val |= TPDA_SYNCR_COUNTER_MASK > >> +    writel_relaxed(val, drvdata->base + TPDA_SYNCR); >>   } >>   static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) >> diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/ >> hwtracing/coresight/coresight-tpda.h >> index 0be625fb52fd..8e1b66115ad1 100644 >> --- a/drivers/hwtracing/coresight/coresight-tpda.h >> +++ b/drivers/hwtracing/coresight/coresight-tpda.h >> @@ -9,6 +9,7 @@ >>   #define TPDA_CR            (0x000) >>   #define TPDA_Pn_CR(n)        (0x004 + (n * 4)) >>   #define TPDA_FPID_CR        (0x084) >> +#define TPDA_SYNCR        (0x08C) >>   /* Cross trigger FREQ packets timestamp bit */ >>   #define TPDA_CR_FREQTS        BIT(2) >> @@ -27,6 +28,11 @@ >>   #define TPDA_Pn_CR_CMBSIZE        GENMASK(7, 6) >>   /* Aggregator port DSB data set element size bit */ >>   #define TPDA_Pn_CR_DSBSIZE        BIT(8) >> +/* TPDA_SYNCR mode control bit */ >> +#define TPDA_SYNCR_MODE_CTRL        BIT(12) >> +/* TPDA_SYNCR counter mask */ >> +#define TPDA_SYNCR_COUNTER_MASK        GENMASK(11, 0) >> +#define TPDA_SYNCR_MAX_COUNTER_VAL    (0xFFF) > > No need to define a numeric value that's the same as the mask. It also > opens the possibility of making a mistake. > will remove. Thanks, Jie >>   #define TPDA_MAX_INPORTS    32 > >