From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752768AbcBKOHV (ORCPT ); Thu, 11 Feb 2016 09:07:21 -0500 Received: from bes.se.axis.com ([195.60.68.10]:44645 "EHLO bes.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751557AbcBKOFE (ORCPT ); Thu, 11 Feb 2016 09:05:04 -0500 X-Amavis-Alert: BAD HEADER SECTION, Duplicate header field: "References" From: Lars Persson To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux-kernel@vger.kernel.org, Lars Persson Subject: [PATCH v2 1/8] clk: add device tree binding for artpec-6 pll1 clock Date: Thu, 11 Feb 2016 15:04:35 +0100 Message-Id: <2686b3bbb9ec1c86828b365645bd7f997a9780b4.1455198819.git.larper@axis.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add device tree documentation for the main PLL in the Artpec-6 SoC. Signed-off-by: Lars Persson --- Documentation/devicetree/bindings/clock/artpec6.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/artpec6.txt diff --git a/Documentation/devicetree/bindings/clock/artpec6.txt b/Documentation/devicetree/bindings/clock/artpec6.txt new file mode 100644 index 0000000..521fec8 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/artpec6.txt @@ -0,0 +1,16 @@ +* Clock bindings for Axis ARTPEC-6 chip + +Required properties: +- #clock-cells: Should be <0> +- compatible: Should be "axis,artpec6-pll1-clock" +- reg: Address and length of the DEVSTAT register. +- clocks: The PLL's input clock. + +Examples: + +pll1_clk: pll1_clk { + #clock-cells = <0>; + compatible = "axis,artpec6-pll1-clock"; + reg = <0xf8000000 4>; + clocks = <&ext_clk>; +}; -- 2.1.4