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Tue, 15 Jun 2021 03:28:31 +0000 Received: from [10.25.75.2] (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 15 Jun 2021 03:28:28 +0000 Subject: Re: Query regarding the use of pcie-designware-plat.c file To: Thierry Reding , "bhelgaas@google.com" , "lorenzo.pieralisi@arm.com" CC: Gustavo Pimentel , "robh+dt@kernel.org" , "amurray@thegoodpenguin.co.uk" , "jingoohan1@gmail.com" , Joao Pinto , Jonathan Hunter , Krishna Thota , "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" References: <34650ed1-6567-3c8f-fe29-8816f0fd74f2@nvidia.com> From: Vidya Sagar Message-ID: <26a86c55-7c35-484a-2e6f-9d5c36b078f4@nvidia.com> Date: Tue, 15 Jun 2021 08:58:26 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2e21e2c1-3005-41fc-310b-08d92fada67e X-MS-TrafficTypeDiagnostic: DM5PR12MB1931: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jun 2021 03:28:31.6972 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2e21e2c1-3005-41fc-310b-08d92fada67e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT006.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1931 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Bjorn / Lorenzo, Could you please comment on the options proposed by Thierry? - Vidya Sagar On 6/9/2021 3:19 PM, Thierry Reding wrote: > On Wed, Jun 09, 2021 at 10:56:48AM +0530, Vidya Sagar wrote: >> >> >> On 6/9/2021 2:47 AM, Gustavo Pimentel wrote: >>> External email: Use caution opening links or attachments >>> >>> >>> Hi Vidya, >>> >>> The pcie-designware-plat.c is the driver for the Synopsys PCIe RC IP >>> prototype. >> Thanks for the info Gustavo. >> But, I don't see any DT file having only "snps,dw-pcie" compatibility >> string. All the DT files that have "snps,dw-pci" compatibility string also >> have their platform specific compatibility string and their respective host >> controller drivers. Also, it is the platform specific compatibility string >> that is used for binding purpose with their respective drivers and not the >> "snps,dw-pcie". So, wondering when will pcie-designware-plat.c be used as >> there is not DT file which has only "snps,dw-pcie" as the compatibility >> string. > > Sounds to me like we have two options: > > 1. If there's indeed real hardware that's identified by the existing > "snps,dw-pcie" compatible string, then it's wrong for other devices > to list that in their compatible string because they are likely not > compatible with that (i.e. they might be from a register point of > view, but at least from an integration point of view they usually > differ). > > 2. If "snps,dw-pcie" is meant to describe the fact that these are all > based off the same IP but may be differently integrated, then there > should be no driver matching on that compatible string. > > Option 2 is not very robust because somebody could easily add a matching > driver at some point in the future. Also, if we don't match on a > compatible string there's not a lot of use in listing it in DT in the > first place. > > So I think option 1 would be preferred. > > Thierry >