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So no need to write to >> PEER registers to START / STOP / PAUSE / TEARDOWN. >> - Unified Channel Space: Tx and Rx channels share a single register >> space. Each channel index is specifically fixed in hardware as either >> Tx or Rx in an interleaved manner. >> >> Signed-off-by: Sai Sree Kartheek Adivi >> >> diff --git a/drivers/dma/ti/k3-udma-common.c b/drivers/dma/ti/k3-udma-common.c >> index 30cb8044ff10..5fa3a7b8d202 100644 >> --- a/drivers/dma/ti/k3-udma-common.c >> +++ b/drivers/dma/ti/k3-udma-common.c >> @@ -2465,9 +2465,16 @@ static int pktdma_setup_resources(struct udma_dev *ud) >> ud->tchan_map = devm_bitmap_zalloc(dev, ud->tchan_cnt, GFP_KERNEL); >> ud->tchans = devm_kcalloc(dev, ud->tchan_cnt, sizeof(*ud->tchans), >> GFP_KERNEL); >> - ud->rchan_map = devm_bitmap_zalloc(dev, ud->rchan_cnt, GFP_KERNEL); >> - ud->rchans = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rchans), >> - GFP_KERNEL); >> + if (ud->match_data->version == K3_UDMA_V1) { >> + ud->rchan_map = devm_bitmap_zalloc(dev, ud->rchan_cnt, GFP_KERNEL); >> + ud->rchans = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rchans), >> + GFP_KERNEL); >> + } else { >> + ud->rchan_map = ud->tchan_map; >> + ud->rchans = ud->tchans; >> + ud->chan_map = ud->tchan_map; >> + ud->chans = ud->tchans; >> + } >> ud->rflow_in_use = devm_kcalloc(dev, BITS_TO_LONGS(ud->rflow_cnt), >> sizeof(unsigned long), >> GFP_KERNEL); >> @@ -2566,13 +2573,21 @@ int k3_udma_setup_resources(struct udma_dev *ud) >> } >> break; >> case DMA_TYPE_PKTDMA: >> - dev_info(dev, >> - "Channels: %d (tchan: %u, rchan: %u)\n", >> - ch_count, >> - ud->tchan_cnt - bitmap_weight(ud->tchan_map, >> - ud->tchan_cnt), >> - ud->rchan_cnt - bitmap_weight(ud->rchan_map, >> - ud->rchan_cnt)); >> + if (ud->match_data->version == K3_UDMA_V1) { >> + dev_info(dev, >> + "Channels: %d (tchan: %u, rchan: %u)\n", >> + ch_count, >> + ud->tchan_cnt - bitmap_weight(ud->tchan_map, >> + ud->tchan_cnt), >> + ud->rchan_cnt - bitmap_weight(ud->rchan_map, >> + ud->rchan_cnt)); >> + } else { >> + dev_info(dev, >> + "Channels: %d (tchan + rchan: %u)\n", >> + ch_count, >> + ud->chan_cnt - bitmap_weight(ud->chan_map, >> + ud->chan_cnt)); >> + } >> break; >> default: >> break; >> diff --git a/drivers/dma/ti/k3-udma-glue.c b/drivers/dma/ti/k3-udma-glue.c >> index 70eaf7ee57e6..996c130b10f4 100644 >> --- a/drivers/dma/ti/k3-udma-glue.c >> +++ b/drivers/dma/ti/k3-udma-glue.c >> @@ -166,6 +166,29 @@ static int of_k3_udma_glue_parse_chn(struct device_node *chn_np, >> goto out_put_spec; >> >> thread_id = dma_spec.args[0]; >> + >> + /* >> + * V2 PKTDMA DT specifiers encode the hardware flow/channel ID in >> + * args[0] rather than the PSI-L thread ID used by V1. Resolve the >> + * PSI-L thread ID before the common path checks the direction bit. >> + */ >> + if (common->udmax->match_data->version == K3_UDMA_V2 && >> + xudma_is_pktdma(common->udmax)) { >> + struct psil_endpoint_config *ep_cfg; >> + u32 psil_thread_id; >> + bool dev_to_mem; >> + >> + ep_cfg = psil_get_ep_config_by_id(thread_id, true, >> + &psil_thread_id, &dev_to_mem); >> + if (IS_ERR(ep_cfg)) { >> + dev_err(common->dev, >> + "No PSI-L config for flow %u\n", thread_id); >> + ret = PTR_ERR(ep_cfg); >> + goto out_put_spec; >> + } >> + thread_id = psil_thread_id; >> + } >> + >> if (dma_spec.args_count == 2) { >> if (dma_spec.args[1] > 2 && !xudma_is_pktdma(common->udmax)) { >> dev_err(common->dev, "Invalid channel atype: %u\n", >> diff --git a/drivers/dma/ti/k3-udma-private.c b/drivers/dma/ti/k3-udma-private.c >> index 44c097fff5ee..525155d3bb51 100644 >> --- a/drivers/dma/ti/k3-udma-private.c >> +++ b/drivers/dma/ti/k3-udma-private.c >> @@ -174,16 +174,30 @@ EXPORT_SYMBOL(xudma_is_pktdma); >> >> int xudma_pktdma_tflow_get_irq(struct udma_dev *ud, int udma_tflow_id) >> { >> - const struct udma_oes_offsets *oes = &ud->soc_data->oes; >> + if (ud->match_data->version == K3_UDMA_V1) { >> + const struct udma_oes_offsets *oes = &ud->soc_data->oes; >> >> - return msi_get_virq(ud->dev, udma_tflow_id + oes->pktdma_tchan_flow); >> + return msi_get_virq(ud->dev, udma_tflow_id + oes->pktdma_tchan_flow); >> + } >> + struct platform_device *pdev = to_platform_device(ud->dev); >> + char irq_name[10]; >> + >> + snprintf(irq_name, sizeof(irq_name), "tx-%u", udma_tflow_id); >> + return platform_get_irq_byname(pdev, irq_name); >> } >> EXPORT_SYMBOL(xudma_pktdma_tflow_get_irq); >> >> int xudma_pktdma_rflow_get_irq(struct udma_dev *ud, int udma_rflow_id) >> { >> - const struct udma_oes_offsets *oes = &ud->soc_data->oes; >> + if (ud->match_data->version == K3_UDMA_V1) { >> + const struct udma_oes_offsets *oes = &ud->soc_data->oes; >> + >> + return msi_get_virq(ud->dev, udma_rflow_id + oes->pktdma_rchan_flow); >> + } >> + struct platform_device *pdev = to_platform_device(ud->dev); >> + char irq_name[10]; >> >> - return msi_get_virq(ud->dev, udma_rflow_id + oes->pktdma_rchan_flow); >> + snprintf(irq_name, sizeof(irq_name), "rx-%u", udma_rflow_id); >> + return platform_get_irq_byname(pdev, irq_name); >> } >> EXPORT_SYMBOL(xudma_pktdma_rflow_get_irq); >> diff --git a/drivers/dma/ti/k3-udma-v2.c b/drivers/dma/ti/k3-udma-v2.c >> index ba3042e866ca..a71471aa7707 100644 >> --- a/drivers/dma/ti/k3-udma-v2.c >> +++ b/drivers/dma/ti/k3-udma-v2.c >> @@ -578,7 +578,7 @@ static int udma_v2_alloc_rx_resources(struct udma_chan *uc) >> >> rflow = uc->rflow; >> if (ud->tflow_cnt) >> - fd_ring_id = ud->tflow_cnt + rflow->id; >> + fd_ring_id = rflow->id; >> else >> fd_ring_id = uc->rchan->id; >> ret = k3_ringacc_request_rings_pair(ud->ringacc, fd_ring_id, -1, >> @@ -770,6 +770,148 @@ static int bcdma_v2_alloc_chan_resources(struct dma_chan *chan) >> return ret; >> } >> >> +static int pktdma_v2_alloc_chan_resources(struct dma_chan *chan) >> +{ >> + struct udma_chan *uc = to_udma_chan(chan); >> + struct udma_dev *ud = to_udma_dev(chan->device); >> + struct platform_device *pdev = to_platform_device(ud->dev); >> + char irq_name[10]; >> + u32 irq_ring_idx; >> + int ret; >> + >> + /* >> + * Make sure that the completion is in a known state: >> + * No teardown, the channel is idle >> + */ >> + reinit_completion(&uc->teardown_completed); >> + complete_all(&uc->teardown_completed); >> + uc->state = UDMA_CHAN_IS_IDLE; >> + >> + switch (uc->config.dir) { >> + case DMA_MEM_TO_DEV: >> + /* Slave transfer synchronized - mem to dev (TX) transfer */ >> + dev_dbg(uc->ud->dev, "%s: chan%d as MEM-to-DEV\n", __func__, >> + uc->id); >> + >> + ret = udma_v2_alloc_tx_resources(uc); >> + if (ret) { >> + uc->config.remote_thread_id = -1; >> + return ret; >> + } >> + >> + uc->config.src_thread = ud->psil_base + uc->tchan->id; >> + uc->config.dst_thread = uc->config.remote_thread_id; >> + uc->config.dst_thread |= K3_PSIL_DST_THREAD_ID_OFFSET; >> + >> + irq_ring_idx = uc->config.mapped_channel_id; >> + break; >> + case DMA_DEV_TO_MEM: >> + /* Slave transfer synchronized - dev to mem (RX) transfer */ >> + dev_dbg(uc->ud->dev, "%s: chan%d as DEV-to-MEM\n", __func__, >> + uc->id); >> + >> + ret = udma_v2_alloc_rx_resources(uc); >> + if (ret) { >> + uc->config.remote_thread_id = -1; >> + return ret; >> + } >> + >> + uc->config.src_thread = uc->config.remote_thread_id; >> + uc->config.dst_thread = (ud->psil_base + uc->rchan->id) | >> + K3_PSIL_DST_THREAD_ID_OFFSET; >> + >> + irq_ring_idx = uc->config.mapped_channel_id; >> + udma_write(uc->rflow->reg_rt, UDMA_RX_FLOWRT_RFA, BIT(28)); >> + break; >> + default: >> + /* Can not happen */ >> + dev_err(uc->ud->dev, "%s: chan%d invalid direction (%u)\n", >> + __func__, uc->id, uc->config.dir); >> + return -EINVAL; >> + } >> + >> + /* check if the channel configuration was successful */ >> + if (ret) >> + goto err_res_free; >> + >> + if (udma_is_chan_running(uc)) { >> + dev_warn(ud->dev, "chan%d: is running!\n", uc->id); >> + ud->reset_chan(uc, false); >> + if (udma_is_chan_running(uc)) { >> + dev_err(ud->dev, "chan%d: won't stop!\n", uc->id); >> + ret = -EBUSY; >> + goto err_res_free; >> + } >> + } >> + >> + uc->dma_dev = dmaengine_get_dma_device(chan); >> + uc->hdesc_pool = dma_pool_create(uc->name, uc->dma_dev, >> + uc->config.hdesc_size, ud->desc_align, >> + 0); >> + if (!uc->hdesc_pool) { >> + dev_err(ud->ddev.dev, >> + "Descriptor pool allocation failed\n"); >> + uc->use_dma_pool = false; >> + ret = -ENOMEM; >> + goto err_res_free; >> + } >> + >> + uc->use_dma_pool = true; >> + >> + uc->psil_paired = true; >> + >> + INIT_DELAYED_WORK(&uc->tx_drain.work, udma_check_tx_completion); >> + >> + if (uc->config.dir == DMA_MEM_TO_DEV) >> + snprintf(irq_name, sizeof(irq_name), "tx-%u", irq_ring_idx); >> + else >> + snprintf(irq_name, sizeof(irq_name), "rx-%u", irq_ring_idx); >> + uc->irq_num_ring = platform_get_irq_byname(pdev, irq_name); >> + if (uc->irq_num_ring < 0) { >> + ret = uc->irq_num_ring; >> + goto err_res_free; >> + } >> + >> + ret = request_irq(uc->irq_num_ring, udma_v2_ring_irq_handler, >> + IRQF_SHARED | IRQF_TRIGGER_HIGH, uc->name, uc); >> + >> + if (ret) { >> + dev_err(ud->dev, "chan%d: ring irq request failed\n", uc->id); >> + goto err_irq_free; >> + } >> + >> + uc->irq_num_udma = 0; >> + >> + udma_reset_rings(uc); >> + >> + if (uc->tchan) >> + dev_dbg(ud->dev, >> + "chan%d: tchan%d, tflow%d, Remote thread: 0x%04x\n", >> + uc->id, uc->tchan->id, uc->tchan->tflow_id, >> + uc->config.remote_thread_id); >> + else if (uc->rchan) >> + dev_dbg(ud->dev, >> + "chan%d: rchan%d, rflow%d, Remote thread: 0x%04x\n", >> + uc->id, uc->rchan->id, uc->rflow->id, >> + uc->config.remote_thread_id); >> + return 0; >> + >> +err_irq_free: >> + uc->irq_num_ring = 0; >> +err_res_free: >> + udma_free_tx_resources(uc); >> + udma_free_rx_resources(uc); >> + >> + udma_reset_uchan(uc); >> + >> + if (uc->use_dma_pool) { >> + dma_pool_destroy(uc->hdesc_pool); >> + uc->use_dma_pool = false; >> + } >> + >> + return ret; >> +} >> + >> static enum dma_status udma_v2_tx_status(struct dma_chan *chan, >> dma_cookie_t cookie, >> struct dma_tx_state *txstate) >> @@ -1032,11 +1174,34 @@ static struct udma_match_data bcdma_v2_am62l_data = { >> .rchan_cnt = 128, >> }; >> >> +static struct udma_match_data pktdma_v2_am62l_data = { >> + .type = DMA_TYPE_PKTDMA, >> + .version = K3_UDMA_V2, >> + .psil_base = 0x1000, >> + .enable_memcpy_support = false, /* PKTDMA does not support MEM_TO_MEM */ >> + .flags = UDMA_FLAGS_J7_CLASS, >> + .statictr_z_mask = GENMASK(23, 0), >> + .burst_size = { >> + TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_64_BYTES, /* Normal Channels */ >> + 0, /* No H Channels */ >> + 0, /* No UH Channels */ >> + }, >> + .tchan_cnt = 97, >> + .rchan_cnt = 97, >> + .chan_cnt = 97, >> + .tflow_cnt = 112, >> + .rflow_cnt = 112, >> +}; >> + >> static const struct of_device_id udma_of_match[] = { >> { >> .compatible = "ti,am62l-dmss-bcdma", >> .data = &bcdma_v2_am62l_data, >> }, >> + { >> + .compatible = "ti,am62l-dmss-pktdma", >> + .data = &pktdma_v2_am62l_data, >> + }, >> { /* Sentinel */ }, >> }; >> >> @@ -1055,15 +1220,23 @@ static int udma_v2_get_mmrs(struct platform_device *pdev, struct udma_dev *ud) >> if (IS_ERR(ud->mmrs[V2_MMR_GCFG])) >> return PTR_ERR(ud->mmrs[V2_MMR_GCFG]); >> >> - ud->bchan_cnt = ud->match_data->bchan_cnt; >> - /* There are no tchan and rchan in BCDMA_V2. >> + /* There are no tchan and rchan in BCDMA_V2 and PKTDMA_V2. >> * Duplicate chan as tchan and rchan to keep the common code >> - * in k3-udma-common.c functional for BCDMA_V2. >> + * in k3-udma-common.c functional. >> */ >> - ud->chan_cnt = ud->match_data->chan_cnt; >> - ud->tchan_cnt = ud->match_data->chan_cnt; >> - ud->rchan_cnt = ud->match_data->chan_cnt; >> - ud->rflow_cnt = ud->chan_cnt; >> + if (ud->match_data->type == DMA_TYPE_BCDMA) { >> + ud->bchan_cnt = ud->match_data->bchan_cnt; >> + ud->chan_cnt = ud->match_data->chan_cnt; >> + ud->tchan_cnt = ud->match_data->chan_cnt; >> + ud->rchan_cnt = ud->match_data->chan_cnt; >> + ud->rflow_cnt = ud->chan_cnt; >> + } else if (ud->match_data->type == DMA_TYPE_PKTDMA) { >> + ud->chan_cnt = ud->match_data->chan_cnt; >> + ud->tchan_cnt = ud->match_data->tchan_cnt; >> + ud->rchan_cnt = ud->match_data->rchan_cnt; >> + ud->tflow_cnt = ud->match_data->tflow_cnt; >> + ud->rflow_cnt = ud->match_data->rflow_cnt; >> + } >> >> for (i = 1; i < V2_MMR_LAST; i++) { >> if (i == V2_MMR_BCHANRT && ud->bchan_cnt == 0) >> @@ -1117,6 +1290,7 @@ static int udma_v2_probe(struct platform_device *pdev) >> ud->reset_chan = udma_v2_reset_chan; >> ud->decrement_byte_counters = udma_v2_decrement_byte_counters; >> ud->bcdma_setup_sci_resources = NULL; >> + ud->pktdma_setup_sci_resources = NULL; >> >> ret = udma_v2_get_mmrs(pdev, ud); >> if (ret) >> @@ -1124,7 +1298,17 @@ static int udma_v2_probe(struct platform_device *pdev) >> >> struct k3_ringacc_init_data ring_init_data = {0}; >> >> - ring_init_data.num_rings = ud->bchan_cnt + ud->chan_cnt; >> + if (ud->match_data->type == DMA_TYPE_BCDMA) { >> + ring_init_data.num_rings = ud->bchan_cnt + ud->chan_cnt; >> + } else if (ud->match_data->type == DMA_TYPE_PKTDMA) { >> + ring_init_data.num_rings = ud->rflow_cnt; > Hmm, how does this work? Shouldnt there be ring allocated for both tflow > and rflow and hence tflow_cnt + rflow_cnt? Vignesh, just like the channels, the flows are interleaved. So both tflow_cnt and rflow_cnt are set to the total flow cnt in case of V2.