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Mon, 20 Oct 2025 03:57:49 -0700 (PDT) Message-ID: <26f1b9ef-2e90-476c-8f95-6bae08f69eb1@gmail.com> Date: Mon, 20 Oct 2025 03:57:46 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/8] reset: imx8mp-audiomix: Fix bad mask values To: Frank Li Cc: Abel Vesa , Peng Fan , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Fabio Estevam , Philipp Zabel , Daniel Baluta , Shengjiu Wang , linux-clk@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Pengutronix Kernel Team References: <20251017112025.11997-1-laurentiumihalcea111@gmail.com> <20251017112025.11997-2-laurentiumihalcea111@gmail.com> Content-Language: en-US From: Laurentiu Mihalcea In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/17/2025 7:28 AM, Frank Li wrote: > On Fri, Oct 17, 2025 at 04:20:18AM -0700, Laurentiu Mihalcea wrote: >> From: Laurentiu Mihalcea >> >> As per the i.MX8MP TRM, section 14.2 "AUDIO_BLK_CTRL", table 14.2.3.1.1 >> "memory map", the definition of the EARC control register shows that the >> EARC controller software reset is controlled via bit 0, while the EARC PHY >> software reset is controlled via bit 1. >> >> This means that the current definitions of IMX8MP_AUDIOMIX_EARC_RESET_MASK >> and IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK are wrong since their values would >> imply that the EARC controller software reset is controlled via bit 1 and >> the EARC PHY software reset is controlled via bit 2. Fix them. >> >> Fixes: a83bc87cd30a ("reset: imx8mp-audiomix: Prepare the code for more reset bits") >> Cc: stable@vger.kernel.org >> Signed-off-by: Laurentiu Mihalcea > Just curious, why previous version can work? good question. I assume this was never tested so I don't think the question of this working in previous versions or not is applicable here. I also looked for the usages of these macros in the DTS and there seems to be no consumer. I discovered the issue while testing the patches from this series. As for testing, I used a dummy consumer driver/node and manually checked the register values after each reset assert/de-assert operation. > > Reviewed-by: Frank Li >> --- >> drivers/reset/reset-imx8mp-audiomix.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/reset/reset-imx8mp-audiomix.c b/drivers/reset/reset-imx8mp-audiomix.c >> index 6b357adfe646..eceb37ff5dc5 100644 >> --- a/drivers/reset/reset-imx8mp-audiomix.c >> +++ b/drivers/reset/reset-imx8mp-audiomix.c >> @@ -14,8 +14,8 @@ >> #include >> >> #define IMX8MP_AUDIOMIX_EARC_RESET_OFFSET 0x200 >> -#define IMX8MP_AUDIOMIX_EARC_RESET_MASK BIT(1) >> -#define IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK BIT(2) >> +#define IMX8MP_AUDIOMIX_EARC_RESET_MASK BIT(0) >> +#define IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK BIT(1) >> >> #define IMX8MP_AUDIOMIX_DSP_RUNSTALL_OFFSET 0x108 >> #define IMX8MP_AUDIOMIX_DSP_RUNSTALL_MASK BIT(5) >> -- >> 2.43.0 >>