From: Sylwester Nawrocki <snawrocki@kernel.org>
To: "Paweł Chmiel" <pawel.mikolaj.chmiel@gmail.com>,
mturquette@baylibre.com, sboyd@kernel.org
Cc: kgene@kernel.org, krzk@kernel.org,
linux-samsung-soc@vger.kernel.org, tomasz.figa@gmail.com,
linux-kernel@vger.kernel.org, cw00.choi@samsung.com,
s.nawrocki@samsung.com, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3] clk: exynos7: Keep aclk_fsys1_200 enabled
Date: Mon, 1 Feb 2021 16:18:36 +0100 [thread overview]
Message-ID: <273b996a-8551-8383-5f9d-61ff5bd9663c@kernel.org> (raw)
In-Reply-To: <20210131170428.3290-1-pawel.mikolaj.chmiel@gmail.com>
On 1/31/21 18:04, Paweł Chmiel wrote:
> This clock must be always enabled to allow access to any registers in
> fsys1 CMU. Until proper solution based on runtime PM is applied
> (similar to what was done for Exynos5433), fix this by calling
> clk_prepare_enable() directly from clock provider driver.
>
> It was observed on Samsung Galaxy S6 device (based on Exynos7420), where
> UFS module is probed before pmic used to power that device.
> In this case defer probe was happening and that clock was disabled by
> UFS driver, causing whole boot to hang on next CMU access.
>
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
> ---
> Changes from v2:
> - Avoid __clk_lookup() call when enabling clock
> Changes from v1:
> - Instead of marking clock as critical, enable it manually in driver.
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
next prev parent reply other threads:[~2021-02-01 15:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20210131170444epcas1p1244bfbf4e3bf121360e973b719a699c0@epcas1p1.samsung.com>
[not found] ` <20210131170428.3290-1-pawel.mikolaj.chmiel@gmail.com>
2021-02-01 4:50 ` Chanwoo Choi
2021-02-01 15:18 ` Sylwester Nawrocki [this message]
2021-02-09 7:48 ` Stephen Boyd
2021-02-09 14:46 ` Sylwester Nawrocki
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