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Mon, 03 Feb 2025 08:38:01 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 5138bxcX030486 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 3 Feb 2025 08:37:59 GMT Received: from [10.219.57.57] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 3 Feb 2025 00:37:55 -0800 Message-ID: <273df630-007d-4aaf-9432-2884a7e94d5e@quicinc.com> Date: Mon, 3 Feb 2025 14:07:52 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 0/2] Add support for GPU SMMU on QCS8300 To: Krzysztof Kozlowski CC: Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , , , , , References: <20250203-b4-branch-gfx-smmu-v4-0-eaa7aa762f48@quicinc.com> <20250203-lean-delightful-ermine-f5b902@krzk-bin> Content-Language: en-US From: Pratyush Brahma In-Reply-To: <20250203-lean-delightful-ermine-f5b902@krzk-bin> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: A3Y4AVxh3AHw6zDw3dRdd7GiAx6Rmuqp X-Proofpoint-GUID: A3Y4AVxh3AHw6zDw3dRdd7GiAx6Rmuqp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-03_03,2025-01-31_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 phishscore=0 bulkscore=0 priorityscore=1501 mlxscore=0 suspectscore=0 adultscore=0 impostorscore=0 clxscore=1015 lowpriorityscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502030068 On 2/3/2025 1:03 PM, Krzysztof Kozlowski wrote: > On Mon, Feb 03, 2025 at 11:17:00AM +0530, Pratyush Brahma wrote: >> Enable GPU SMMU function on QCS8300 platform. GPU SMMU is required >> for address translation in GPU device. >> >> Signed-off-by: Pratyush Brahma >> -- >> Changes since v3: >> - Modified the order of clock voting and properties as suggested by Konrad >> - Removed dependency on clocks in commit text as change is merged in >> linux-next before current base commit >> >> Link to v3: >> https://lore.kernel.org/all/20241227105818.28516-1-quic_pbrahma@quicinc.com/ >> > How are you sending these? > > b4 diff 20250203-b4-branch-gfx-smmu-v4-0-eaa7aa762f48@quicinc.com > Grabbing thread from lore.kernel.org/all/20250203-b4-branch-gfx-smmu-v4-0-eaa7aa762f48@quicinc.com/t.mbox.gz > Checking for older revisions > Grabbing search results from lore.kernel.org > Added from v3: 2 patches > --- > Analyzing 7 messages in the thread > Preparing fake-am for v3: dt-bindings: arm-smmu: Document QCS8300 GPU SMMU > ERROR: v3 series incomplete; unable to create a fake-am range > --- > Could not create fake-am range for lower series v3 I have sent this version of the patch series using b4 for the first time, as suggested earlier [1]. The issue might be due to the previous version being sent incorrectly using git send-mail. Consequently, I had to manually apply the previous patches after creating the b4 branch, since "b4 prep -F" was throwing an error when trying to apply the last patch. [1] https://lore.kernel.org/all/64ak7h5pwqinmcymas5i4xexa6bntvti7zkwfhzx7qrsmgaow3@zmn7jffcrp5f/ > > Best regards, > Krzysztof > -- Thanks and Regards Pratyush Brahma