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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=A5xc+aWG c=1 sm=1 tr=0 ts=6a717f26 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=Q/e3f29T3Hw2hnAEzBPF7w==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=gEfo2CItAAAA:8 a=D19gQVrFAAAA:8 a=EUspDBNiAAAA:8 a=XqDJFxXNpytrKbGnDnMA:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 a=sptkURWiP4Gy88Gu7hUp:22 a=W4TVW4IDbPiebHqcZpNg:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODA0MDA0NSBTYWx0ZWRfXz0lpjdZwoF3/ O5GWKnBZaO0VqwbWt6XzUXOH9pZWFML+oS1bYmhEhp+yTp27tnLe+ewFYWJottGcoWlnvDhDhyH +0guNGKdlwzFMUlbBTXlRllSlR191a607JOEdOh+V2FZ+jAwHIAlPVQdBG5iZ4sPqAndhVJ/J/M YIKFUZ3wb3HWlaePYC2LA/VWQuK4TVnIE/vDd87IxfMaU6+oFwGXUIesNXrpdt99ZG9Tab8v6dD oO41994I9HBv9HDe81JXrJ2AOLhLTtWw1xdAbNUxmlK43fCwiPNPckIj/t+peeq5zHD/EUrqCKr A0CEhcHvj25K8VdCAsLyAQ+0g/3XEoVgdJ+WxPNNxTF/51JuEJH/hQp0xEJzhUvrqmSxF/UW3KF EIZtlR9Y/aQg8tOmmgB2eNzYMtt7GN+MyU6HpgfKL/3Pp3t/lrCZbXnxpmNKTT6BpDMJy8lhWAZ 3wnfrroG5GDQSo2oNsw== X-Proofpoint-Spam-Info: AW1haW4tMjYwODA0MDA0NSBTYWx0ZWRfX8oqjOjHJXWRV SqzmIniQJv/DjR89XrFysLBWeiZt6Sm5nc1bVCTqqcdJlsuWiNtYOUdy9PdR3KEGob7kYW/T815 OxZkaPYLVIAN81ybWqB1rf2M8d/obzA= X-Proofpoint-ORIG-GUID: LqAAy-l-omTpFtHnByV7AIw-Zv4NANOh X-Proofpoint-GUID: LqAAy-l-omTpFtHnByV7AIw-Zv4NANOh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-04_01,2026-08-03_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 clxscore=1015 suspectscore=0 adultscore=0 bulkscore=0 spamscore=0 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608040045 Hi Dmitry, On 8/3/2026 9:16 PM, Dmitry Baryshkov wrote: > On Fri, Jul 31, 2026 at 10:26:39PM +0300, Gjorgji Rosikopulos (Consultant) wrote: >> Hi Dmitry, Atanas, >> >> On 7/30/2026 7:24 PM, Atanas Filipov wrote: >>> On 7/30/2026 6:39 PM, Dmitry Baryshkov wrote: >>>> On Thu, Jul 30, 2026 at 06:05:22PM +0300, Atanas Filipov wrote: >>>>> Add device-tree binding for the Qualcomm JPEG encoder hardware block >>>>> present in SM8250 (Kona) SoCs. >>>>> >>>>> The JPEG encoder is a standalone hardware IP within the camera subsystem >>>>> that performs JPEG compression in memory-to-memory fashion. It is >>>>> separate from the CAMSS ISP pipeline and has its own register space, >>>>> interrupt, clocks, power domain, IOMMU streams, and interconnect paths. >>>>> >>>>> Signed-off-by: Atanas Filipov >>>>> --- >>>>> .../bindings/media/qcom,sm8250-jpeg-enc.yaml | 156 ++++++++++++++++++ >>>>> 1 file changed, 156 insertions(+) >>>>> create mode 100644 Documentation/devicetree/bindings/media/qcom,sm8250-jpeg-enc.yaml >>>>> >>>>> diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-jpeg-enc.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-jpeg-enc.yaml >>>>> new file mode 100644 >>>>> index 000000000000..70f573100573 >>>>> --- /dev/null >>>>> +++ b/Documentation/devicetree/bindings/media/qcom,sm8250-jpeg-enc.yaml >>>>> @@ -0,0 +1,156 @@ >>>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >>>>> +%YAML 1.2 >>>>> +--- >>>>> +$id: http://devicetree.org/schemas/media/qcom,sm8250-jpeg-enc.yaml# >>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>>>> + >>>>> +title: Qualcomm JPEG Encoder >>>>> + >>>>> +maintainers: >>>>> + - Atanas Filipov >>>>> + >>>>> +description: >>>>> + Qualcomm JPEG Encoder is the JPEG encode hardware present in Qualcomm SoCs. >>>>> + The encoder is a standalone hardware IP within the camera subsystem that >>>>> + performs JPEG compression in memory-to-memory fashion. >>>>> + >>>>> +properties: >>>>> + compatible: >>>>> + enum: >>>>> + - qcom,sm8250-jpeg-enc >>>>> + >>>>> + reg: >>>>> + maxItems: 1 >>>>> + >>>>> + interrupts: >>>>> + maxItems: 1 >>>>> + >>>>> + clocks: >>>>> + maxItems: 5 >>>>> + >>>>> + clock-names: >>>>> + items: >>>>> + - const: sf_axi >>>>> + - const: core_ahb >>>>> + - const: cpas_ahb >>>>> + - const: cnoc_axi >>>>> + - const: jpeg >>>>> + >>>>> + power-domains: >>>>> + maxItems: 3 >>>>> + >>>>> + power-domain-names: >>>>> + items: >>>>> + - const: titan_top >>>>> + - const: mmcx >>>>> + - const: mx >>>>> + >>>>> + interconnects: >>>>> + maxItems: 2 >>>>> + >>>>> + interconnect-names: >>>>> + items: >>>>> + - const: cpu-cfg >>>>> + - const: sf-mnoc >>>>> + >>>>> + iommus: >>>>> + description: >>>>> + SMMU stream ID for the JPEG hardware. The stream ID 0x2040 is used >>>>> + for the JPEG core engine on SM8250. >>>>> + maxItems: 1 >>>>> + >>>>> + operating-points-v2: true >>>>> + >>>>> + opp-table: >>>>> + type: object >>>>> + >>>>> +required: >>>>> + - compatible >>>>> + - reg >>>>> + - clocks >>>>> + - clock-names >>>>> + - interrupts >>>>> + - power-domains >>>>> + - power-domain-names >>>>> + - interconnects >>>>> + - interconnect-names >>>>> + - iommus >>>>> + >>>>> +additionalProperties: false >>>>> + >>>>> +examples: >>>>> + - | >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + #include >>>>> + >>>>> + jpeg-encoder@ac53000 { >>>>> + compatible = "qcom,sm8250-jpeg-enc"; >>>>> + reg = <0x0ac53000 0x1000>; >>>>> + >>>>> + interrupts = ; >>>>> + >>>>> + power-domains = <&camcc TITAN_TOP_GDSC>, >>>>> + <&rpmhpd RPMHPD_MMCX>, >>>>> + <&rpmhpd RPMHPD_MX>; >>>>> + power-domain-names = "titan_top", "mmcx", "mx"; >>>>> + >>>>> + clocks = <&gcc GCC_CAMERA_SF_AXI_CLK>, >>>>> + <&camcc CAM_CC_CORE_AHB_CLK>, >>>>> + <&camcc CAM_CC_CPAS_AHB_CLK>, >>>>> + <&camcc CAM_CC_CAMNOC_AXI_CLK>, >>>>> + <&camcc CAM_CC_JPEG_CLK>; >>>>> + clock-names = "sf_axi", >>>>> + "core_ahb", >>>>> + "cpas_ahb", >>>>> + "cnoc_axi", >>>>> + "jpeg"; >>>> >>>> What are the pin input names for these clocks on the JPEG side? Can we >>>> use a better name? >> >> The name of the the clock on jpeg side(based on documentation we have) is >> cam_cc_jpeg_clk, There was comment from Krzysztof "https://lkml.org/lkml/2026/5/15/1112" >> to drop cam and clk, so it remains cc_jpeg or only jpeg. >> >> As i can see in ope patches ope_clk is named as "core", do we have some general >> guidance how to name those clocks? or if you have any preference or proposal it will >> be included in next patchset. > > "core" is better. It defines the purpose. They problem with clamping the > "cam_cc_foo_clk" names is that they change from time to time, while the > IP core doesn't actually change. I undestand, ok then we will use core to have similar approach as OPE driver. > >>>>> + >>>>> + jpeg_opp_table: opp-table { >>>>> + compatible = "operating-points-v2"; >>>>> + >>>>> + opp-100000000 { >>>>> + opp-hz = /bits/ 64 <400000000>, >>>>> + /bits/ 64 <100000000>; >>>> >>>> So, you've identified the issue earlier. The shared clocks need to be >>>> scaled, taking all users in account. Please come up with the solution >>>> too. >> >> One proposal is to have camnoc icc clock provider, there is implementation >> available and it will be posted, What is the preference to have different >> patchset or to have camnoc icc provider as part of this patchset new version? > > It definitely can't come _after_ this patch. We already have CAMSS > voting on those clocks, so adding JPEG shoudn't disrupt its > functionality. Ok, then the camnoc icc + changes in camss will came first then on top the JPEG driver. ~Gjorgji