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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b9b202663c6sm238521366b.23.2026.03.27.03.07.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Mar 2026 03:07:56 -0700 (PDT) Message-ID: <27adcbd2-0ec3-4a8f-84d6-ba381a66772d@oss.qualcomm.com> Date: Fri, 27 Mar 2026 11:07:53 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/2] phy: qcom-mipi-csi2: Add a CSI2 MIPI DPHY driver To: Hangxiang Ma , Bryan O'Donoghue , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong Cc: Bryan O'Donoghue , Vladimir Zapolskiy , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260326-x1e-csi2-phy-v5-0-0c0fc7f5c01b@linaro.org> <20260326-x1e-csi2-phy-v5-2-0c0fc7f5c01b@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: j97fX-rGqlmzjOhJFFULh1aiLXiSMyql X-Proofpoint-GUID: j97fX-rGqlmzjOhJFFULh1aiLXiSMyql X-Authority-Analysis: v=2.4 cv=CoGys34D c=1 sm=1 tr=0 ts=69c656fe cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=anbA2sijppV0hw6aPocA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI3MDA3NCBTYWx0ZWRfX1Lg+fYUxXaKY TTw5ixWEPdScNmz/oX7/v0K3qqMQNodQNwUuREs1I9ccy4I7nEwqLevfALE/I2hZ748HsMKsFTy cD1wLEiYgBzY5NHjuKpaFoB+Qrum3KErKejlCXDlJ/fzszxXSHMd2aw9FEjnJITZ4/y9CkJnnB7 IBJcTla5xlMsewpiUlAsHMlEMlL/Je1Di5xN4I9ZJNmC73m93AyeFsRtERxb4jaV7/QKGOXtE+z r2B08SffSZmDjY0dRHFI4k2YD1WnzfieQSlCrAN2Bb9pd21tnQszsERPghwRv5o1tSrXdlC8z+x nw+enLRplKuAWqKyjf7VvN6xyun7DOs0s2shglFPpKqAVZTnKyKeksbNjSdO9VhO8b5uTbo/IOL lDo77molBVV5rWl5DgbJ7GUOVYNnVF922sU2rYfUilBIDWAZ9P4S4BwRjZOYNhAFPWA9X+xs4s+ NpSzE+bYwM8MF7AQ+dg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-26_04,2026-03-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 suspectscore=0 malwarescore=0 clxscore=1015 lowpriorityscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603270074 On 3/27/26 3:23 AM, Hangxiang Ma wrote: > On 3/26/2026 9:04 AM, Bryan O'Donoghue wrote: >> +#include >> +#include >> +#include >> +#include >> + >> +#include "phy-qcom-mipi-csi2.h" >> + >> +#define CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(offset, n)    ((offset) + 0x4 * (n)) >> +#define CSIPHY_3PH_CMN_CSI_COMMON_CTRL0_PHY_SW_RESET    BIT(0) >> +#define CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE    BIT(7) >> +#define CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_COMMON_PWRDN_B    BIT(0) >> +#define CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_SHOW_REV_ID    BIT(1) >> +#define CSIPHY_3PH_CMN_CSI_COMMON_CTRL10_IRQ_CLEAR_CMD    BIT(0) >> +#define CSIPHY_3PH_CMN_CSI_COMMON_STATUSn(offset, n)    ((offset) + 0xb0 + 0x4 * (n)) >> > Hi Bryan, one minor observation on the following macro: > >     CSIPHY_3PH_CMN_CSI_COMMON_STATUSn > > The 0xb0 offset implicitly assumes a fixed distance between the > common_ctrl and common_status register blocks. This holds for the PHYs > covered by this series, but on some other platforms (e.g. Kaanapali, > Pakala) the offset differs. > > That said, I think keeping this fixed value is reasonable for the scope > of the current PHY series, and it does help keep the macro set simple. > It might just be worth documenting this assumption (e.g. via a comment > or in the commit message). > > Alternatively, if future PHY variants need to support different layouts, > this could be made more extensible by moving the status base offset into > the per-PHY data (similar to other register layout parameters). But I > don’t think that needs to block the current series. If the register contents are generally similar but the bit positions and/or reg offsets differ, regmap_fields may be useful Konrad