From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Sean Christopherson <seanjc@google.com>,
Rick P Edgecombe <rick.p.edgecombe@intel.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"kas@kernel.org" <kas@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Yan Y Zhao <yan.y.zhao@intel.com>,
wenlong hou <houwenlong.hwl@antgroup.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"linux-coco@lists.linux.dev" <linux-coco@lists.linux.dev>
Subject: Re: [PATCH v4 1/4] KVM: TDX: Synchronize user-return MSRs immediately after VP.ENTER
Date: Thu, 23 Oct 2025 13:59:20 +0800 [thread overview]
Message-ID: <28073044-5aa2-49b2-b789-70728d1cce7d@intel.com> (raw)
In-Reply-To: <aPfgJjcuMgkXfe51@google.com>
On 10/22/2025 3:33 AM, Sean Christopherson wrote:
> On Tue, Oct 21, 2025, Rick P Edgecombe wrote:
>> On Tue, 2025-10-21 at 08:06 -0700, Sean Christopherson wrote:
>>> I think we should be synchronizing only after a successful VP.ENTER with a real
>>>>> TD exit, but today instead we synchronize after any attempt to VP.ENTER.
>>>
>>> Well this is all completely @#($*#. Looking at the TDX-Module source, if the
>>> TDX-Module synthesizes an exit, e.g. because it suspects a zero-step attack, it
>>> will signal a "normal" exit but not "restore" VMM state.
>>
>> Oh yea, good point. So there is no way to tell from the return code if the
>> clobbering happened.
>>
>>>
>>>> If the MSR's do not get clobbered, does it matter whether or not they get
>>>> restored.
>>>
>>> It matters because KVM needs to know the actual value in hardware. If KVM thinks
>>> an MSR is 'X', but it's actually 'Y', then KVM could fail to write the correct
>>> value into hardware when returning to userspace and/or when running a different
>>> vCPU.
>>>
>>> Taking a step back, the entire approach of updating the "cache" after the fact is
>>> ridiculous. TDX entry/exit is anything but fast; avoiding _at most_ 4x WRMSRs at
>>> the start of the run loop is a very, very premature optimization. Preemptively
>>> load hardware with the value that the TDX-Module _might_ set and call it good.
>>>
>>> I'll replace patches 1 and 4 with this, tagged for stable@.
>>
>> Seems reasonable to me in concept, but there is a bug. It looks like some
>> important MSR isn't getting restored right and the host gets into a bad state.
>> The first signs start with triggering this:
>>
>> asmlinkage __visible noinstr struct pt_regs *fixup_bad_iret(struct pt_regs
>> *bad_regs)
>> {
>> struct pt_regs tmp, *new_stack;
>>
>> /*
>> * This is called from entry_64.S early in handling a fault
>> * caused by a bad iret to user mode. To handle the fault
>> * correctly, we want to move our stack frame to where it would
>> * be had we entered directly on the entry stack (rather than
>> * just below the IRET frame) and we want to pretend that the
>> * exception came from the IRET target.
>> */
>> new_stack = (struct pt_regs *)__this_cpu_read(cpu_tss_rw.x86_tss.sp0) -
>> 1;
>>
>> /* Copy the IRET target to the temporary storage. */
>> __memcpy(&tmp.ip, (void *)bad_regs->sp, 5*8);
>>
>> /* Copy the remainder of the stack from the current stack. */
>> __memcpy(&tmp, bad_regs, offsetof(struct pt_regs, ip));
>>
>> /* Update the entry stack */
>> __memcpy(new_stack, &tmp, sizeof(tmp));
>>
>> BUG_ON(!user_mode(new_stack)); <---------------HERE
>>
>> Need to debug.
>
> /facepalm
>
> diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c
> index 63abfa251243..cde91a995076 100644
> --- a/arch/x86/kvm/vmx/tdx.c
> +++ b/arch/x86/kvm/vmx/tdx.c
> @@ -801,8 +801,8 @@ void tdx_prepare_switch_to_guest(struct kvm_vcpu *vcpu)
> * state.
> */
> for (i = 0; i < ARRAY_SIZE(tdx_uret_msrs); i++)
> - kvm_set_user_return_msr(i, tdx_uret_msrs[i].slot,
> - tdx_uret_msrs[i].defval);
> + kvm_set_user_return_msr(tdx_uret_msrs[i].slot,
> + tdx_uret_msrs[i].defval, -1ull);
> }
>
> static void tdx_prepare_switch_to_host(struct kvm_vcpu *vcpu)
with the above fix, the whole diff/implementation works. It passes our
internal TDX CI.
next prev parent reply other threads:[~2025-10-23 5:59 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-16 22:28 [PATCH v4 0/4] KVM: x86: User-return MSR cleanups Sean Christopherson
2025-10-16 22:28 ` [PATCH v4 1/4] KVM: TDX: Synchronize user-return MSRs immediately after VP.ENTER Sean Christopherson
2025-10-20 22:55 ` Edgecombe, Rick P
2025-10-21 13:37 ` Adrian Hunter
2025-10-21 15:06 ` Sean Christopherson
2025-10-21 16:36 ` Adrian Hunter
2025-10-21 16:46 ` Sean Christopherson
2025-10-21 18:54 ` Edgecombe, Rick P
2025-10-21 19:33 ` Sean Christopherson
2025-10-21 20:49 ` Edgecombe, Rick P
2025-10-23 5:59 ` Xiaoyao Li [this message]
2025-10-16 22:28 ` [PATCH v4 2/4] KVM: x86: Leave user-return notifier registered on reboot/shutdown Sean Christopherson
2025-10-17 5:32 ` Chao Gao
2025-10-17 15:27 ` Sean Christopherson
2025-10-16 22:28 ` [PATCH v4 3/4] KVM: x86: Don't disable IRQs when unregistering user-return notifier Sean Christopherson
2025-10-16 22:28 ` [PATCH v4 4/4] KVM: x86: Drop "cache" from user return MSR setter that skips WRMSR Sean Christopherson
2025-10-17 2:52 ` Chao Gao
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