Re: [PATCH 4/7] x86/umwait_contro: Set global umwait maximum time limit and umwait C0.2 state

[Andy Lutomirski <luto@kernel.org>]

On 07/23/2018 05:55 AM, Fenghua Yu wrote:
> UMWAIT or TPAUSE called by user process makes processor to reside in
> a light-weight power/performance optimized state (C0.1 state) or an
> improved power/performance optimized state (C0.2 state).
> 
> IA32_UMWAIT_CONTROL MSR register allows OS to set global maximum umwait
> time and disable C0.2 on the processor.
> 
> The maximum time value in IA32_UMWAIT_CONTROL[31-2] is set as zero which
> means there is no global time limit for UMWAIT and TPAUSE instructions.
> Each process sets its own umwait maximum time as the instructions operand.
> We don't set a non-zero global umwait maximum time value to enforce user
> wait timeout because we couldn't find any usage for it.

Do you know what the instruction designers had in mind?  I assume they 
were thinking of *something*, but I'm seriously mystified by three things:

  - Why does CF work the way it does?  It seems like it would be 
genuinely useful for CF to indicate whether the in-register timeout has 
expired, but that's not what CF does.

  - Why does the global timeout apply even at CPL 0?

  - Why does the C0.2 control apply at CPL 0?

And I'm also a bit surprised that the instruction can't be turned off 
entirely for CPL 3.