From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5120310F9; Wed, 7 May 2025 17:00:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746637247; cv=none; b=AX8e5EI141z4aucy3DdP0EI+Y1loIBBtm0Qqx5N1FBG4AWLHoh9nl+KJiuDdx7NTwKSTSQJKaXFO9vPmLwzTTsG9bQbKUrBF/y/qL1qRuu3IIhC40kkAzJd53+E033Uw5KEfNykwhC+dyqJYE15J/1FOP6J54MiRh5v5C+2fKwU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746637247; c=relaxed/simple; bh=rJkpAr1apQ3BjXBzScslXWgVRmmq2IDLhDkNuhrW25o=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=ZCtA6iPdSlnRKU+otHH8NsKEmcqwae9b04APsshuKawjffu+Gx6QWFUTe9YH++cfq3hpSO5ONkg43NTqcl0zia0y39uAxemdEZQa/c9DJKIAJYyuSbcrSZoPgThHrgjj/UC7nQU8mIQbYTLOh/mXIAzch2BJlMhGI4cQsM6iLtQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=V2HFT7ut; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="V2HFT7ut" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 547H0c9x1582333 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 7 May 2025 12:00:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1746637238; bh=COsi7czH8qaZZ7x1a7SmRwuxTQo32qR7Uo5j1icnvjk=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=V2HFT7ut3ple1yorqjYVLBkw98IDUImDcTNmbolwk+VYTtgm19N8JgybV2KEI99Vv SkY25o1rZYnQEZnGx4dSrdvnU6t95iCNxMJXoRJzT+Xvr92on+pzWnOaW39NocQGVU 95tsH0mK1loZ+pW2X4cj00QTY4QOaPOR7NPb/TnE= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 547H0c33028108 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 May 2025 12:00:38 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 7 May 2025 12:00:38 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 7 May 2025 12:00:38 -0500 Received: from [128.247.81.19] (uda0506412.dhcp.ti.com [128.247.81.19]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 547H0cDT006228; Wed, 7 May 2025 12:00:38 -0500 Message-ID: <287d2607-c2f8-4024-850b-dfe0b4b96fc2@ti.com> Date: Wed, 7 May 2025 12:00:38 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7/7] arm64: dts: ti: k3-am62p5-sk: Set wakeup-source system-states To: Markus Schneider-Pargmann , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Vishal Mahaveer , Kevin Hilman , Dhruva Gole , Sebin Francis , Akashdeep Kaur References: <20250421-topic-am62-dt-partialio-v6-15-v1-0-6ced30aafddb@baylibre.com> <20250421-topic-am62-dt-partialio-v6-15-v1-7-6ced30aafddb@baylibre.com> Content-Language: en-US From: Kendall Willis In-Reply-To: <20250421-topic-am62-dt-partialio-v6-15-v1-7-6ced30aafddb@baylibre.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea On 4/21/25 03:14, Markus Schneider-Pargmann wrote: > The CANUART pins of mcu_mcan0, mcu_mcan1, mcu_uart0 and wkup_uart0 are > powered during Partial-IO and IO+DDR and are capable of waking up the > system in these states. Specify the states in which these units can do a > wakeup on this board. > > Note that the UARTs are not capable of wakeup in Partial-IO because of > of a UART mux on the board not being powered during Partial-IO. > > Add pincontrol definitions for mcu_mcan0 and mcu_mcan1 for wakeup from > Partial-IO. Add these as wakeup pinctrl entries for both devices. > > Signed-off-by: Markus Schneider-Pargmann > --- > arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 76 +++++++++++++++++++++++++++++++++ > 1 file changed, 76 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts > index d29f524600af017af607e2cb6122d3a581575ffc..35b950e444353c416e33344dfff42e2edeab3aba 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts > +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts > @@ -683,3 +683,79 @@ &mcu_gpio0 { > &mcu_gpio_intr { > status = "reserved"; > }; > + > +&mcu_mcan0 { > + pinctrl-names = "default", "wakeup"; > + pinctrl-0 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_default>; > + pinctrl-1 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_wakeup>; > + wakeup-source = <&system_partial_io>, > + <&system_io_ddr>, > + <&system_deep_sleep>, > + <&system_mcu_only>, > + <&system_standby>; > + status = "okay"; > +}; > + > +&mcu_mcan1 { > + pinctrl-names = "default", "wakeup"; > + pinctrl-0 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_default>; > + pinctrl-1 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_wakeup>; > + wakeup-source = <&system_partial_io>, > + <&system_io_ddr>, > + <&system_deep_sleep>, > + <&system_mcu_only>, > + <&system_standby>; > + status = "okay"; > +}; > + > +&mcu_uart0 { > + wakeup-source = <&system_io_ddr>, > + <&system_deep_sleep>, > + <&system_mcu_only>, > + <&system_standby>; > +}; > + > +&wkup_uart0 { > + wakeup-source = <&system_io_ddr>, > + <&system_deep_sleep>, > + <&system_mcu_only>, > + <&system_standby>; > +}; > + > +&mcu_pmx0 { > + mcu_mcan0_tx_pins_default: mcu-mcan0-tx-default-pins { > + pinctrl-single,pins = < > + AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ > + >; > + }; > + > + mcu_mcan0_rx_pins_default: mcu-mcan0-rx-default-pins { > + pinctrl-single,pins = < > + AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ > + >; > + }; > + > + mcu_mcan0_rx_pins_wakeup: mcu-mcan0-rx-wakeup-pins { > + pinctrl-single,pins = < > + AM62X_IOPAD(0x038, PIN_INPUT | WKUP_EN, 0) /* (B3) MCU_MCAN0_RX */ > + >; > + }; > + > + mcu_mcan1_tx_pins_default: mcu-mcan1-tx-default-pins { > + pinctrl-single,pins = < > + AM62X_IOPAD(0x03c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */ > + >; > + }; > + > + mcu_mcan1_rx_pins_default: mcu-mcan1-rx-default-pins { > + pinctrl-single,pins = < > + AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */ > + >; > + }; > + > + mcu_mcan1_rx_pins_wakeup: mcu-mcan1-rx-wakeup-pins { > + pinctrl-single,pins = < > + AM62X_IOPAD(0x040, PIN_INPUT | WKUP_EN, 0) /* (D4) MCU_MCAN1_RX */ > + >; > + }; > +}; > Hi Markus, I have the same concerns with this patch as I did with the previous patch (arm64: dts: ti: k3-am62a7-sk: Set wakeup-source system-states). Both the wkup_uart and mcu_pmx0 have already been referenced early in the dts and could be consolidated. This patch also does not apply cleanly to linux-next. Best, Kendall Willis