From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91E32C4321D for ; Wed, 22 Aug 2018 17:02:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 47D7C208E3 for ; Wed, 22 Aug 2018 17:02:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 47D7C208E3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727450AbeHVU1p (ORCPT ); Wed, 22 Aug 2018 16:27:45 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:35622 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726892AbeHVU1o (ORCPT ); Wed, 22 Aug 2018 16:27:44 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 990F880D; Wed, 22 Aug 2018 10:02:03 -0700 (PDT) Received: from [10.4.12.131] (e110467-lin.Emea.Arm.com [10.4.12.131]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E28B13F5BC; Wed, 22 Aug 2018 10:02:01 -0700 (PDT) Subject: Re: [PATCH v5 5/5] iommu/arm-smmu-v3: add bootup option "iommu.non_strict" To: Zhen Lei , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel Cc: LinuxArm , Hanjun Guo , Libin , John Garry References: <1534296510-12888-1-git-send-email-thunder.leizhen@huawei.com> <1534296510-12888-6-git-send-email-thunder.leizhen@huawei.com> From: Robin Murphy Message-ID: <29330cf7-d269-c4db-2f5a-632509058987@arm.com> Date: Wed, 22 Aug 2018 18:02:00 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <1534296510-12888-6-git-send-email-thunder.leizhen@huawei.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 15/08/18 02:28, Zhen Lei wrote: > Add a bootup option to make the system manager can choose which mode to > be used. The default mode is strict. > > Signed-off-by: Zhen Lei > --- > Documentation/admin-guide/kernel-parameters.txt | 13 +++++++++++++ > drivers/iommu/arm-smmu-v3.c | 22 +++++++++++++++++++++- > 2 files changed, 34 insertions(+), 1 deletion(-) > > diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt > index 5cde1ff..cb9d043e 100644 > --- a/Documentation/admin-guide/kernel-parameters.txt > +++ b/Documentation/admin-guide/kernel-parameters.txt > @@ -1720,6 +1720,19 @@ > nobypass [PPC/POWERNV] > Disable IOMMU bypass, using IOMMU for PCI devices. > > + iommu.non_strict= [ARM64] > + Format: { "0" | "1" } > + 0 - strict mode, default. > + Release IOVAs after the related TLBs are invalid > + completely. > + 1 - non-strict mode. > + Put off TLBs invalidation and release memory first. > + It's good for scatter-gather performance but lacks > + full isolation, an untrusted device can access the > + reused memory because the TLBs may still valid. > + Please take full consideration before choosing this > + mode. Note that, VFIO will always use strict mode. > + > iommu.passthrough= > [ARM64] Configure DMA to bypass the IOMMU by default. > Format: { "0" | "1" } > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > index 61eb7ec..0eda90e 100644 > --- a/drivers/iommu/arm-smmu-v3.c > +++ b/drivers/iommu/arm-smmu-v3.c > @@ -631,6 +631,26 @@ struct arm_smmu_option_prop { > { 0, NULL}, > }; > > +static bool smmu_non_strict __read_mostly; > + > +static int __init arm_smmu_setup(char *str) > +{ > + int ret; > + > + ret = kstrtobool(str, &smmu_non_strict); > + if (ret) > + return ret; > + > + if (smmu_non_strict) { > + pr_warn("WARNING: iommu non-strict mode is chosen.\n" > + "It's good for scatter-gather performance but lacks full isolation\n"); > + add_taint(TAINT_WARN, LOCKDEP_STILL_OK); > + } > + > + return 0; > +} > +early_param("iommu.non_strict", arm_smmu_setup); As I said on v3, the option should be parsed by iommu-dma, since that's where it takes effect, and I'm sure SMMUv2 users will be interested in trying it out too. In other words, if iommu_dma_init_domain() does something like: if (iommu_dma_non_strict && domain->ops->flush_iotlb_all) { domain->non_strict = true; cookie->domain = domain; init_iova_flush_queue(...); } > + > static inline void __iomem *arm_smmu_page1_fixup(unsigned long offset, > struct arm_smmu_device *smmu) > { > @@ -1622,7 +1642,7 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain) > if (smmu->features & ARM_SMMU_FEAT_COHERENCY) > pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_NO_DMA; > > - if (domain->type == IOMMU_DOMAIN_DMA) { > + if ((domain->type == IOMMU_DOMAIN_DMA) && smmu_non_strict) { > domain->non_strict = true; > pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT; > } ...then all the driver should need to do is: if (domain->non_strict) pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT; Now, that would make it possible to request non-strict mode even with drivers which *don't* understand it, but I think that's not actually harmful, just means that some TLBIs will still get issued synchronously and the flush queue might not do much. If you wanted to avoid even that, you could replace domain->non_strict with an iommu_domain_set_attr() call, so iommu_dma could tell up-front whether the driver understands non-strict mode and it's worth setting the queue up or not. Robin.