From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754097AbbIWThT (ORCPT ); Wed, 23 Sep 2015 15:37:19 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:61499 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751932AbbIWThR (ORCPT ); Wed, 23 Sep 2015 15:37:17 -0400 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: David Daney , David Daney , Marc Zyngier , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, David Daney , linux-pci@vger.kernel.org, Bjorn Helgaas Subject: Re: [PATCH] arm64/pci: Add quirks for Cavium Thunder PCI bridges. Date: Wed, 23 Sep 2015 21:36:42 +0200 Message-ID: <29453556.BCB7AZ5P6c@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <5602CCA4.8070606@caviumnetworks.com> References: <1442966996-13419-1-git-send-email-ddaney.cavm@gmail.com> <1675889.xYIhzenZEC@wuerfel> <5602CCA4.8070606@caviumnetworks.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:ipSOR6IeLHqLkJcKO5FT/boysFE9U52kbgeRI9QHE8kTkXl/zVz 6BvOpcoEC+6MuKqGXKedrsGxHIN9zbgvyuYudXUpa4uwFw+O6wKwlV5oINIoJIN6oHPyCFn V/LnWpgg0+bqUsBsldEO//pGB7r0kCyzWEn9hCLL28LX24m+B+KYKesu7owzm1HPdzqAnRt bPTdgf42UV3tKakYnIfwQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:lRRn0pd45Tc=:bsEZV0OaUuhKNypT9p2TS+ 1n0SAbTv9W4kUZPI3otZvaiyI6COvDIq5GzUVhT5aKf/2BMlsf5CIbceELnO0an2bnA/I61// 1G4hTJc7qWfKMD9dc+a5UYbdhxJixUEQYyRyUghbBtunNMCsHWRPANYgOzbt9MfN8F87IjRTS lqP2UNVtlaaNtESROBg+X+bwZ0fsDXH8qelSdEj9PpeYWWyoMzBvGxqvrd0+iaqrg4NO4ENjI +Qog+/y49F017yT5uIWY+wIyeXP1BtdS2jKcN//ogkhrzy4Z23HJanS5l6yICiHVHqhAFKmRq BPEoHAYlbZBTiyo9o74zk9b52D7Uldw5toM8DgX1KT1fLWL3nfsb5j+LEkTdyvc5QON37qrjA G0C5FJc/F7tYvysIZuAEwuntb4BNjJ86OdqdWngAW7bvnlRr9isZnxRZXdL8KnMtmNd4M658X gS4ueQl5ucQo5Gsms3ybc+wCEMUyijbY1TrhMHprrgSMaJW1wsh9WPXXHZZ+xaH0cOgdzcImg vC38Ug3wvA9Zz84bHqAzC1cbJyOX6JJbZcRzRaVQiOw2vDZVCRs+uPMvqFdW/nn0nr7KMhJFS SFMEiTqjdul3Fltnd82pCXtnYpZTj+3ZXnkMsTkoG3CoDA50dTuY+kLRpSxQ+idUkREBZiN2F FHzhtEPtsWCzslDVDwxjwkVyzDQ6rHCuV1X4jVpBELrOp/cqJfXViwz1y1Q2hpCXSisRK+JqT ANX8UG1pdAy2vbew Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 23 September 2015 09:00:36 David Daney wrote: > On 09/23/2015 12:51 AM, Arnd Bergmann wrote: > > On Tuesday 22 September 2015 17:09:56 David Daney wrote: > >> From: David Daney > >> > >> The Cavium ThunderX SoC needs a PCI quirk for its on-chip bridges. > >> Since it is arm64, create a new quirks.c file there to contain arm64 > >> related quirks. Add the ThunderX bridge quirk, gated by a new config > >> variable, so that it can be disabled for kernels that aren't expected > >> to be used on ThunderX. > >> > >> Signed-off-by: David Daney > >> --- > >> arch/arm64/Kconfig | 11 +++++++++++ > >> arch/arm64/kernel/Makefile | 2 +- > >> arch/arm64/kernel/quirks.c | 36 ++++++++++++++++++++++++++++++++++++ > >> 3 files changed, 48 insertions(+), 1 deletion(-) > >> create mode 100644 arch/arm64/kernel/quirks.c > >> > > > > Looks reasonable to me. Just one question: Is the same bridge used > > on MIPS machines? > > No. The MIPS64 based OCTEON family of SoCs does not contain > PCI-buses/config-space/bridges for on-chip hardware blocks. The on-chip > blocks in OCTEON are all platform devices. So, ... > > > If so, maybe it should be moved to drivers/pci/quirks.c > > instead for better reuse. > > The quirk is specific to some arm64 based SoCs, thus my idea to have > arch specific quirks. Ok. Arnd