From: <Tudor.Ambarus@microchip.com>
To: <yangyicong@hisilicon.com>
Cc: <me@yadavpratyush.com>, <p.yadav@ti.com>,
<miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>,
<broonie@kernel.org>, <Nicolas.Ferre@microchip.com>,
<alexandre.belloni@bootlin.com>,
<Ludovic.Desroches@microchip.com>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<linux-spi@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <nsekhar@ti.com>
Subject: Re: [PATCH v4 05/16] mtd: spi-nor: default to address width of 3 for configurable widths
Date: Tue, 28 Apr 2020 05:25:17 +0000 [thread overview]
Message-ID: <2970660.P4alVuHkju@192.168.0.120> (raw)
In-Reply-To: <f6a593ab-8685-18e0-04c8-25edd1cab11a@hisilicon.com>
On Tuesday, April 28, 2020 4:34:46 AM EEST Yicong Yang wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hi Pratyush,
>
> On 2020/4/28 1:23, Pratyush Yadav wrote:
> > Hi Yicong,
> >
> > On 26/04/20 11:53AM, Yicong Yang wrote:
> >> On 2020/4/25 2:43, Pratyush Yadav wrote:
> >>> JESD216D.01 says that when the address width can be 3 or 4, it defaults
> >>> to 3 and enters 4-byte mode when given the appropriate command. So, when
> >>> we see a configurable width, default to 3 and let flash that default to
> >>> 4 change it in a post-bfpt fixup.
> >>>
> >>> This fixes SMPT parsing for flashes with configurable address width. If
> >>> the SMPT descriptor advertises variable address width, we use
> >>> nor->addr_width as the address width. But since it was not set to any
> >>> value from the SFDP table, the read command uses an address width of 0,
> >>> resulting in an incorrect read being issued.
> >>>
> >>> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> >>> ---
> >>>
> >>> drivers/mtd/spi-nor/sfdp.c | 1 +
> >>> 1 file changed, 1 insertion(+)
> >>>
> >>> diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
> >>> index f917631c8110..5cecc4ba2141 100644
> >>> --- a/drivers/mtd/spi-nor/sfdp.c
> >>> +++ b/drivers/mtd/spi-nor/sfdp.c
> >>> @@ -460,6 +460,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
> >>>
> >>> /* Number of address bytes. */
> >>> switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK)
> >>> {
> >>>
> >>> case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
> >>> + case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4:
> >>> nor->addr_width = 3;
> >>> break;
> >>
> >> Should we also assign address width to 3 in default condition. At least
> >> we should not leave it uninitialized here.
> >
> > The default condition would be taken when this field is 3. The value 3
> > is reserved, and so no current device should use this value. That said,
> > I don't see any downsides of doing so. If the value 3 means something
> > else in later revisions of the standard, this code would need to change
> > anyway. If not, we would use a relatively sane default for devices with
> > a faulty BFPT.
>
> The purpose is to set one possible value which may be used later in parsing
> smpt. In current driver, if we do nothing with the post-bfpt fixup, then
> the width will be unset. Otherwise, maybe the width can also be set in
> spi_nor_smpt_addr_width()
>
> default:
> + if (!nor->addr_width)
> + nor->addr_width = 3;
> return nor->addr_width;
>
> But set when parsing bfpt seems more reasonable.
Please don't. Any deviations from the standard should be addressed with fixup
hooks.
>
> > I haven't received any comments on my series so far. If end up having to
Thanks for the patience, they are in my todo list, I will get soon to them.
Cheers,
ta
next prev parent reply other threads:[~2020-04-28 5:25 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-24 18:43 [PATCH v4 00/16] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-04-24 18:43 ` [PATCH v4 01/16] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2020-04-24 18:43 ` [PATCH v4 02/16] spi: atmel-quadspi: reject DTR ops Pratyush Yadav
2020-04-30 11:32 ` Mark Brown
2020-04-30 12:17 ` Pratyush Yadav
2020-04-30 12:19 ` Mark Brown
2020-04-24 18:43 ` [PATCH v4 03/16] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2020-04-24 18:43 ` [PATCH v4 04/16] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-04-24 18:43 ` [PATCH v4 05/16] mtd: spi-nor: default to address width of 3 for configurable widths Pratyush Yadav
2020-04-26 3:53 ` Yicong Yang
2020-04-27 17:23 ` Pratyush Yadav
2020-04-28 1:34 ` Yicong Yang
2020-04-28 5:25 ` Tudor.Ambarus [this message]
2020-04-24 18:44 ` [PATCH v4 06/16] mtd: spi-nor: prepare BFPT parsing for JESD216 rev D Pratyush Yadav
2020-04-24 18:44 ` [PATCH v4 07/16] mtd: spi-nor: get command opcode extension type from BFPT Pratyush Yadav
2020-04-24 18:44 ` [PATCH v4 08/16] mtd: spi-nor: parse xSPI Profile 1.0 table Pratyush Yadav
2020-04-24 18:44 ` [PATCH v4 09/16] mtd: spi-nor: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-04-24 18:44 ` [PATCH v4 10/16] mtd: spi-nor: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-04-24 18:44 ` [PATCH v4 11/16] mtd: spi-nor: enable octal DTR mode when possible Pratyush Yadav
2020-04-24 18:44 ` [PATCH v4 12/16] mtd: spi-nor: perform a Soft Reset on shutdown Pratyush Yadav
2020-05-10 11:22 ` Tudor.Ambarus
2020-05-11 18:01 ` Pratyush Yadav
2020-04-24 18:44 ` [PATCH v4 13/16] mtd: spi-nor: Disable Octal DTR mode on suspend Pratyush Yadav
2020-04-24 18:44 ` [PATCH v4 14/16] mtd: spi-nor: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-04-24 18:44 ` [PATCH v4 15/16] mtd: spi-nor: add support for Cypress Semper flash Pratyush Yadav
2020-04-24 18:44 ` [PATCH v4 16/16] mtd: spi-nor: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-05-11 9:00 ` [PATCH v4 00/16] mtd: spi-nor: add xSPI Octal DTR support Tudor.Ambarus
2020-05-11 9:27 ` Boris Brezillon
2020-05-11 18:24 ` Pratyush Yadav
2020-05-12 6:16 ` Tudor.Ambarus
2020-05-12 9:49 ` Vignesh Raghavendra
2020-05-12 11:29 ` Tudor.Ambarus
2020-05-12 18:46 ` Pratyush Yadav
2020-05-11 9:43 ` Vignesh Raghavendra
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