Re: [PATCH v7 net-next PATCH 1/1] net: phy: air_en8811h: Add clk provider for CKO pin

[Andrew Lunn <andrew@lunn.ch>]

On Tue, Apr 08, 2025 at 11:01:18PM +0800, Lucien.Jheng wrote:
> EN8811H outputs 25MHz or 50MHz clocks on CKO, selected by GPIO3.
> CKO clock operates continuously from power-up through md32 loading.
> Implement clk provider driver so we can disable the clock output in case
> it isn't needed, which also helps to reduce EMF noise
> 
> Signed-off-by: Lucien.Jheng <lucienx123@gmail.com>
>  #include <linux/property.h>
>  #include <linux/wordpart.h>
>  #include <linux/unaligned.h>
> +#include <linux/clk-provider.h>

We try to keep thinks sorted in order. The includes are not quite
correct, but still clk-provider.h should be first.

>  #define EN8811H_PHY_ID		0x03a2a411
> 
> @@ -112,6 +113,11 @@
>  #define   EN8811H_POLARITY_TX_NORMAL		BIT(0)
>  #define   EN8811H_POLARITY_RX_REVERSE		BIT(1)
> 
> +#define EN8811H_CLK_CGM		0xcf958
> +#define   EN8811H_CLK_CGM_CKO		BIT(26)
> +#define EN8811H_HWTRAP1		0xcf914
> +#define   EN8811H_HWTRAP1_CKO		BIT(12)
> +
>  #define EN8811H_GPIO_OUTPUT		0xcf8b8
>  #define   EN8811H_GPIO_OUTPUT_345		(BIT(3) | BIT(4) | BIT(5))

and registers should be in order, so 0xcf958 goes after 0xcf8b8.

> +static int en8811h_clk_is_enabled(struct clk_hw *hw)
> +{
> +	struct en8811h_priv *priv = clk_hw_to_en8811h_priv(hw);
> +	struct phy_device *phydev = priv->phydev;
> +	int ret;
> +	u32 pbus_value;

Reverse Christmas tree please. Sort them longest to shortest.

	Andrew