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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: R6azOThwazlsQq-sy16eLPMaD9_KcJF4 X-Proofpoint-GUID: R6azOThwazlsQq-sy16eLPMaD9_KcJF4 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE4MDA3MSBTYWx0ZWRfX0aX+zAN/Ly7H EK/uBRwOL6ReCYOQttCC4sWEz2+jktKrLTyFpEgkPmOQpa22DxjzdKxX1JuGYpRkygbWo7urRQS ShxCYiq1WNBv+QYXaIx3VwGZSgCc609ANNPFOuvg3Yk/MG3axyfdIa3IfjkWqYVwycdpdq/bJRm AFVVBatPTxKs6V5omPtYPzDVVAFOnXjJ8Tc4jaSyVGTVlG9Ls7CptyLurB4DEKtrLw+iyv/dzqw 5BdvNftVRchkyR0M1Lt6orjdEgw4467iux29AoJC/mUXy4sEIzm+HESV6TC98oDzTiTKXSCgehl jRG7oMf2nFQHK73f/tjalFVmQVfV61N8CuoM4C7jt1tTCwh4yD/kK1t4rHCJqNYpDt0P34MO+si h4lCB5A0wZ2g5JIdSU9YRahmL/JBnToCI5lN7XFUrJ2vNCXmag9kgkkeLse9jxXFC1gsh6mWykr u1HjIEB8gXK5/ttOofw== X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE4MDA3MSBTYWx0ZWRfXyh7SEbKwmdbA iowYK1mhPuptEzSpyNaykN421tduczV4O/2m/fDXBsqEYgEJKKyoCaCbynRJ/jZOvBQdW63Od1l tr+Mlku1fJXwQLPYH0+m3pKC4sjv2Q0= X-Authority-Analysis: v=2.4 cv=YJKvDxGx c=1 sm=1 tr=0 ts=6a33a60e cx=c_pps a=N1BjEkVkxJi3uNfLdpvX3g==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=NCwGtS5HQ1RdJiNybOgA:9 a=QEXdDO2ut3YA:10 a=crWF4MFLhNY0qMRaF8an:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-17_02,2026-06-17_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 adultscore=0 impostorscore=0 clxscore=1015 suspectscore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606180071 On 6/16/26 11:25 AM, Maulik Shah wrote: > Before commit 4dc70713dc24 ("irqchip/qcom-pdc: Kill non-wakeup irqdomain") > there are separate domains for direct SPIs and GPIO used as SPIs. Separate > domains can be useful in case irqchip want to differentiate both of them. > Since commit unified both the domains there is no way to differentiate. > > In preparation to add the second level interrupt controller support where > GPIO interrupts get latched at PDC (but not direct SPIs) there is a need to > differentiate between SPIs and GPIOs as SPIs. Reverting above commit do not > seem a good option either which leads to waste of resources. > > PDC HW have the IRQ_PARAM register telling number of direct SPIs and number > of GPIOs as SPIs. Further PDC allocates direct SPIs at the beginning and > all GPIOs as SPIs are allocated at the end. This information can be used in > driver to differentiate them. > > Add the support to read this register and keep this information in > struct pdc_desc. Later change utilizes same. > > Signed-off-by: Maulik Shah > --- [...] > + irq_param = pdc_reg_read(pdc->regs->irq_param_reg, 0); > + pdc->num_spis = FIELD_GET(GENMASK(7, 0), irq_param); > + pdc->num_gpios = FIELD_GET(GENMASK(15, 8), irq_param); num_gpios is not used in this series, please either drop it or use it to limit the index in the following patches Konrad