Re: [PATCH] clk: qcom: a53: Corrected frequency multiplier for 1152MHz

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 6/5/26 2:55 AM, Phillip Varney wrote:
> The 1152MHz frequency entry for the a53 currently selects a multiplier of 62, giving 1190MHz. This changes the mulitiplier to 60 giving the intended 1152MHz.
> 
> Signed-off-by: Phillip Varney <pbvarney@protonmail.com>
> ---
>  drivers/clk/qcom/a53-pll.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c
> index 724a642311e5..0549b214fcfc 100644
> --- a/drivers/clk/qcom/a53-pll.c
> +++ b/drivers/clk/qcom/a53-pll.c
> @@ -20,7 +20,7 @@
>  static const struct pll_freq_tbl a53pll_freq[] = {
>  	{  998400000, 52, 0x0, 0x1, 0 },
>  	{ 1094400000, 57, 0x0, 0x1, 0 },
> -	{ 1152000000, 62, 0x0, 0x1, 0 },
> +	{ 1152000000, 60, 0x0, 0x1, 0 },
>  	{ 1209600000, 63, 0x0, 0x1, 0 },
>  	{ 1248000000, 65, 0x0, 0x1, 0 },
>  	{ 1363200000, 71, 0x0, 0x1, 0 },

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

what's more is that msm-3.10 also has this entry:

F_APCS_PLL(1190400000, 62, 0x0, 0x1, 0x0, 0x0, 0x0),

which seems not to have been used in the cpufreq map (but exists
in the clock driver)

Konrad