Re: [PATCH v1] mmc: Add quirk MMC_QUIRK_BROKEN_CACHE_FLUSH for Micron eMMC Q2J54A

[Bean Huo <beanhuo@iokpp.de>]

On Thu, 2023-09-14 at 15:59 +0200, Ulf Hansson wrote:
> On Wed, 13 Sept 2023 at 20:57, Bean Huo <beanhuo@iokpp.de> wrote:
> > 
> > From: Bean Huo <beanhuo@micron.com>
> > 
> > Micron MTFC4GACAJCN eMMC supports cache but requires that flush
> > cache
> > operation be allowed only after a write has occurred. Otherwise,
> > the
> > cache flush command or subsequent commands will time out.
> 

Hi Uffe, 

Thanks for your review. 

> This needs some more explanation I think. What does "after a write"
> really mean?
> 

"After a write" means that the cache flush command is only
meaningful/allowed or necessary when the data write command occurs. 


> According to the changes below, we are tracking only whether a write
> has been done and then we set host->card->written_flag = true - keep
> it like that forever.
> 
> What happens beyond a power cycle for example? Like in the recovery
> path or in the system wide suspend/resume path? Does the flag need to
> be reset in those cases too?
> 

Yes, during recovery and system/runtime suspend/resume we want to reset
this flag and set it again when a data write command occurs.

 we found that on some systems,  the cache will be flushed after the
system power on/reset,  the cache in the eMMC is actually empty at this
time, and cache flush is meaningless. But for this eMMC device,
flushing the cache before writing data causes problems. This is what
this quirk meant.

However, after writing, and then doing a cache flush, similar to the
following, the cache flush will work even if the cache is empty. So, we
only care about just-boot/reset/resume.


Kind regards,
Bean

> Kind regards
> Uffe