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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b723f6e06f8sm211219066b.38.2025.11.04.04.29.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 04 Nov 2025 04:29:10 -0800 (PST) Message-ID: <29b32098-39ca-440d-9b51-915157b752b5@oss.qualcomm.com> Date: Tue, 4 Nov 2025 13:29:08 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] PCI: qcom: Program correct T_POWER_ON value for L1.2 exit timing To: Krishna Chaitanya Chundru , Manivannan Sadhasivam , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mayank.rana@oss.qualcomm.com, quic_vbadigan@quicinc.com References: <20251104-t_power_on_fux-v1-1-eb5916e47fd7@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20251104-t_power_on_fux-v1-1-eb5916e47fd7@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTA0MDEwMyBTYWx0ZWRfX21XmssxXTQSp INJidKj7cv6Hlj9uPBXtu2KO15ihbqFZKSjqg8bX9ql5wuMPXYkHHPON7fgFYCRZZH1ohZ6wSz4 uCUpVJxEuYYyNNepzFZQCLidWkSvKBxRr1LwExzzukCc2NUr+wJTVB9lufN/XPgyZC66TGngbJ6 8532Y4zZiSlkL/Wg7nU/UoOpHHsTtA+XQ1cFHpzJDuARws42L3U+KMScLwKNuDuI1BF1AeL/3XH Fl9mc0hYOcvDS0B35BZOKGeVOdwBhCwo8W380wZuwojb+0Fe+Drpmj4FIX6G98MB4DHpS8NIK1x JoOLA6YK+QZsA+IHIxh+n9Muqw6SJWZNEzSuBa5F8rRfKV9xEFpnp0IXX7HpG6DkCkEbTJ/HcCX 4gzNBoRyiuOaKVyzPqFqIlNImErsVw== X-Proofpoint-ORIG-GUID: sZhS-hg4c0SDhOuvNGa3uVYHazgaq9ln X-Proofpoint-GUID: sZhS-hg4c0SDhOuvNGa3uVYHazgaq9ln X-Authority-Analysis: v=2.4 cv=auy/yCZV c=1 sm=1 tr=0 ts=6909f198 cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=0-KxG6J98Nod6oUgsXgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=zgiPjhLxNE0A:10 a=1HOtulTD9v-eNWfpl4qZ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-04_01,2025-11-03_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 bulkscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 spamscore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511040103 On 11/4/25 1:12 PM, Krishna Chaitanya Chundru wrote: > The T_POWER_ON indicates the time (in μs) that a Port requires the port > on the opposite side of Link to wait in L1.2.Exit after sampling CLKREQ# > asserted before actively driving the interface. This value is used by > the ASPM driver to compute the LTR_L1.2_THRESHOLD. > > Currently, the root port exposes a T_POWER_ON value of zero in the L1SS > capability registers, leading to incorrect LTR_L1.2_THRESHOLD calculations. > This can result in improper L1.2 exit behavior and can trigger AER's. > > To address this, program the T_POWER_ON value to 80us (scale = 1, > value = 8) in the PCI_L1SS_CAP register during host initialization. This > ensures that ASPM can take the root port's T_POWER_ON value into account > while calculating the LTR_L1.2_THRESHOLD value. Is 80us a meaningful value, or "just happens to work"? Konrad