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charset=utf-8 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3826.700.81\)) Subject: Re: [PATCH v6 2/3] drm/tyr: add GPU reset infrastructure From: Daniel Almeida In-Reply-To: <20260821155814.980146-1-work@onurozkan.dev> Date: Fri, 21 Aug 2026 13:39:45 -0300 Cc: linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, dri-devel@lists.freedesktop.org, dakr@kernel.org, aliceryhl@google.com, airlied@gmail.com, simona@ffwll.ch, ojeda@kernel.org, boqun@kernel.org, gary@garyguo.net, bjorn3_gh@protonmail.com, lossin@kernel.org, a.hindborg@kernel.org, tmgross@umich.edu Content-Transfer-Encoding: quoted-printable Message-Id: <2AD43D0D-2B01-47E3-AACB-32032B3358C9@collabora.com> References: <20260819-tyr-reset-impl-v6-0-7b4e1e041fe5@onurozkan.dev> <20260819-tyr-reset-impl-v6-2-7b4e1e041fe5@onurozkan.dev> <653D47F5-0AF3-44B5-9896-F0AA81F67B61@collabora.com> <20260821155814.980146-1-work@onurozkan.dev> To: =?utf-8?Q?Onur_=C3=96zkan?= X-Mailer: Apple Mail (2.3826.700.81) X-ZohoMailClient: External > On 21 Aug 2026, at 12:58, Onur =C3=96zkan wrote: >=20 > On Fri, 21 Aug 2026 12:31:03 -0300 > Daniel Almeida wrote: >=20 >> Hi Onur, >>=20 >>> On 19 Aug 2026, at 15:45, Onur =C3=96zkan = wrote: >>>=20 >>> Add support for scheduling GPU resets on a dedicated workqueue. = Track >>> the reset state to avoid queueing another reset while one is already >>> pending or in progress. >>>=20 >>> Use an SRCU based gate with mutex-protected reader admission to = block >>> hardware accesses while reset work runs and wait for current users >>> before resetting. >>>=20 >>> Stop new reset requests during teardown and drain any queued or = running >>> reset work before releasing the device resources. >>>=20 >>> This is the initial reset infrastructure only. It is not wired to a = reset >>> source yet as those will follow in separate work. >>>=20 >>> Link: https://gitlab.freedesktop.org/panfrost/linux/-/work_items/28 >>> Signed-off-by: Onur =C3=96zkan >>=20 >> I=E2=80=99d use dev_info instead, I don=E2=80=99t think a reset = belongs in dev_dbg. >=20 > It was dev_dbg initially, Danillo said otherwise and I changed it. I = have no > strong feeling on both. >=20 You mean it was dev_info initially? > Does it deserve a new version to switch back into dev_dbg again? I = think we can > easily switch that when pulling this series. My point is that resetting the GPU should not be a =E2=80=9Cdebug=E2=80=9D= trace, but rather something that should hit dmesg unconditionally. Of all things that are printed on = a driver, a=20 =E2=80=9Chey the GPU is being reset because something crashed=E2=80=9D = is something that should always show up IMHO. I don=E2=80=99t think you need to send a new version though, let=E2=80=99s= wait for more feedback as well. =E2=80=94 Daniel