mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: "H. Peter Anvin" <hpa@zytor.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Xin Li <xin3.li@intel.com>,
	linux-kernel@vger.kernel.org, x86@kernel.org, tglx@linutronix.de,
	mingo@redhat.com, dave.hansen@linux.intel.com,
	peterz@infradead.org, brgerst@gmail.com,
	chang.seok.bae@intel.com, jgross@suse.com
Subject: Re: [PATCH v6 5/5] x86/gsseg: use the LKGS instruction if available for load_gs_index()
Date: Mon, 01 Jul 2024 01:01:54 -0700	[thread overview]
Message-ID: <2B27D0A2-B1D0-4347-8587-DCFDB05BF683@zytor.com> (raw)
In-Reply-To: <20240701064002.GBZoJPQg2IXSCRa4sN@fat_crate.local>

On June 30, 2024 11:40:02 PM PDT, Borislav Petkov <bp@alien8.de> wrote:
>On Sun, Jun 30, 2024 at 11:31:42PM -0700, H. Peter Anvin wrote:
>> Yes, all loads into a segment register are truncated to 16 bits.
>
>Right, but are we saying that somewhere explicitly or it is too obvious so
>that there's no need to?
>

I don't know. It is stated in a number of places, but I don't know if it is explicit in *this* specific context.

  reply	other threads:[~2024-07-01  8:02 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-12  7:20 [PATCH v6 0/5] x86: Enable LKGS instruction Xin Li
2023-01-12  7:20 ` [PATCH v6 1/5] x86/cpufeature: add the cpu feature bit for LKGS Xin Li
2023-01-12 12:16   ` [tip: x86/cpu] x86/cpufeature: Add the CPU " tip-bot2 for H. Peter Anvin (Intel)
2023-01-12  7:20 ` [PATCH v6 2/5] x86/opcode: add the LKGS instruction to x86-opcode-map Xin Li
2023-01-12 12:16   ` [tip: x86/cpu] x86/opcode: Add " tip-bot2 for H. Peter Anvin (Intel)
2023-01-12  7:20 ` [PATCH v6 3/5] x86/gsseg: make asm_load_gs_index() take an u16 Xin Li
2023-01-12 12:16   ` [tip: x86/cpu] x86/gsseg: Make " tip-bot2 for H. Peter Anvin (Intel)
2023-01-12  7:20 ` [PATCH v6 4/5] x86/gsseg: move load_gs_index() to its own new header file Xin Li
2023-01-12 12:16   ` [tip: x86/cpu] x86/gsseg: Move " tip-bot2 for H. Peter Anvin (Intel)
2023-01-12  7:20 ` [PATCH v6 5/5] x86/gsseg: use the LKGS instruction if available for load_gs_index() Xin Li
2023-01-13  9:36   ` [tip: x86/cpu] x86/gsseg: Use " tip-bot2 for H. Peter Anvin (Intel)
2024-06-30 16:04   ` [PATCH v6 5/5] x86/gsseg: use " Borislav Petkov
2024-07-01  2:34     ` H. Peter Anvin
2024-07-01  6:08       ` Borislav Petkov
2024-07-01  6:31         ` H. Peter Anvin
2024-07-01  6:40           ` Borislav Petkov
2024-07-01  8:01             ` H. Peter Anvin [this message]
2024-07-01  9:47               ` Borislav Petkov
2023-01-12 12:13 ` [PATCH v6 0/5] x86: Enable LKGS instruction Ingo Molnar
2023-01-12 14:57   ` Peter Zijlstra
2023-01-13 13:29     ` Ingo Molnar
2023-01-13 18:26       ` Li, Xin3

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=2B27D0A2-B1D0-4347-8587-DCFDB05BF683@zytor.com \
    --to=hpa@zytor.com \
    --cc=bp@alien8.de \
    --cc=brgerst@gmail.com \
    --cc=chang.seok.bae@intel.com \
    --cc=dave.hansen@linux.intel.com \
    --cc=jgross@suse.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=peterz@infradead.org \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    --cc=xin3.li@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®