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From: John Youn <John.Youn@synopsys.com>
To: Doug Anderson <dianders@chromium.org>,
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Subject: Re: [PATCH v6 10/22] usb: dwc2: host: Properly set the HFIR
Thread-Topic: [PATCH v6 10/22] usb: dwc2: host: Properly set the HFIR
Thread-Index: AQHRWjwshZY93g5n8kytPr0iESLC5A==
Date: Wed, 10 Feb 2016 02:08:45 +0000
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On 1/31/2016 2:19 PM, Doug Anderson wrote:
> Kever,
> 
> On Sun, Jan 31, 2016 at 1:23 AM, Kever Yang <kever.yang@rock-chips.com> wrote:
>> Doug,
>>
>> On 01/29/2016 10:20 AM, Douglas Anderson wrote:
>>>
>>> According to the most up to date version of the dwc2 databook, the FRINT
>>> field of the HFIR register should be programmed to:
>>> * 125 us * (PHY clock freq for HS) - 1
>>> * 1000 us * (PHY clock freq for FS/LS) - 1
>>
>> I got 3 version of dwc_otg databook, 2.74a, 2.94a and 3.10a,
>> all the doc describe the FrInt as:
> 
> Can you check to see if you can get 3.30a (October 2015)?
> 
> 
>> * 125 us * (PHY clock freq for HS)
>> * 1000 us * (PHY clock freq for FS/LS)
>>
>> Maybe John can help to check the design.
> 
> Yes, this really needs John or someone at Synopsys.
> 
> 

The "- 1" is the correct value. The databook was corrected in 3.30a
and this applies to all previous versions of the core.

John