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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6005a6e637dsm6880a12.43.2025.05.15.08.35.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 May 2025 08:35:03 -0700 (PDT) Message-ID: <2a49a457-9b6a-481b-9b04-c9747ac67003@oss.qualcomm.com> Date: Thu, 15 May 2025 17:35:00 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 17/18] arm64: dts: qcom: sm8550: Additionally manage MXC power domain in camcc To: Jagadeesh Kona , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Vladimir Zapolskiy , Dmitry Baryshkov Cc: Ajit Pandey , Imran Shaik , Taniya Das , Satya Priya Kakitapalli , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Bryan O'Donoghue References: <20250515-videocc-pll-multi-pd-voting-v4-0-571c63297d01@quicinc.com> <20250515-videocc-pll-multi-pd-voting-v4-17-571c63297d01@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250515-videocc-pll-multi-pd-voting-v4-17-571c63297d01@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 37eHdzubmwvMCusqiF_TGkFjBBqSi1iI X-Proofpoint-ORIG-GUID: 37eHdzubmwvMCusqiF_TGkFjBBqSi1iI X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTE1MDE1NCBTYWx0ZWRfX+O3lCzy0Ntxc gd/72VBanyC+TiQBZstzWpqB1ganIoPd4oYemH6TxD0Zor1t2c9rKpY6CP8m15QOO4hU3SBU2ch UZj88r+Tfl1ux2ulTwwmNb07tVZ4dQ5Fvzb6RghjU2WR9iI/QUwku3tXAXdfN2ZRjcQicZqehM3 WMUTUReuAQNezX9kT2akW+eKoy6cVC2y9QeXa+kYi8BPFdQBnW4UzYlFJ+Lwmf27u9MHGvMQdb5 8TqRJhzEfQSjheRQA3kd2ItMg1Sb5zSNnbyuwgqk4gFza4PnF4u+QNyWZhoT9GFfwT7czXmQK8w RfmnKozXLMAxj7lZ8e6PUd9pqFVlRc5ilKbzeows0vaiBE5K+f7OK/Xln/aUEp1lMXEp44vkzAe u1jBwZh7zAFlPmEV4d4oVpBb45ujEXuiDQT/PxrPy/xJZ7fARDXLFsDmzniJwrjoGsQX2H9a X-Authority-Analysis: v=2.4 cv=LOFmQIW9 c=1 sm=1 tr=0 ts=682609a9 cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=KKAkSRfTAAAA:8 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=9YvV8F1douotiZniFPIA:9 a=NqO74GWdXPXpGKcKHaDJD/ajO6k=:19 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 a=cvBusfyB2V15izCimMoJ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-15_06,2025-05-15_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 adultscore=0 priorityscore=1501 suspectscore=0 mlxscore=0 malwarescore=0 mlxlogscore=632 impostorscore=0 bulkscore=0 clxscore=1015 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505070000 definitions=main-2505150154 On 5/14/25 9:09 PM, Jagadeesh Kona wrote: > From: Vladimir Zapolskiy > > Camcc requires both MMCX and MXC rails to be powered ON to configure > the camera PLLs on SM8550 platform. Hence add MXC power domain to > camcc node on SM8550. While at it, update SM8550_MMCX macro to RPMHPD_MMCX > to align towards common macros. > > Fixes: e271b59e39a6f ("arm64: dts: qcom: sm8550: Add camera clock controller") > Signed-off-by: Vladimir Zapolskiy > Signed-off-by: Jagadeesh Kona > Reviewed-by: Taniya Das > --- Reviewed-by: Konrad Dybcio Konrad