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Wed, 10 Jul 2024 13:14:58 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46ADEvhF020617 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 10 Jul 2024 13:14:57 GMT Received: from [10.239.97.152] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 10 Jul 2024 06:14:51 -0700 Message-ID: <2ab60446-7187-43c9-893b-68cac8c9b96f@quicinc.com> Date: Wed, 10 Jul 2024 21:14:49 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 08/13] media: qcom: camss: csiphy-3ph: Add Gen2 v1.2 two-phase MIPI CSI-2 DPHY init To: Krzysztof Kozlowski , , , , , , , CC: , , , , , References: <20240709160656.31146-1-quic_depengs@quicinc.com> <20240709160656.31146-9-quic_depengs@quicinc.com> Content-Language: en-US From: Depeng Shao In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: gvrLUFD4Czg5RT3Ve2NcwOzvn-dSwMuv X-Proofpoint-GUID: gvrLUFD4Czg5RT3Ve2NcwOzvn-dSwMuv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-10_08,2024-07-10_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 mlxlogscore=999 phishscore=0 spamscore=0 priorityscore=1501 bulkscore=0 suspectscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407100092 On 7/10/2024 7:09 PM, Krzysztof Kozlowski wrote: > On 09/07/2024 18:06, Depeng Shao wrote: >> Add a PHY configuration sequence for the SM8550 which uses a Qualcomm >> Gen 2 version 1.2 CSI-2 PHY. >> >> The PHY can be configured as two phase or three phase in C-PHY or D-PHY >> mode. This configuration supports two-phase D-PHY mode. >> >> Signed-off-by: Depeng Shao >> --- >> .../qcom/camss/camss-csiphy-3ph-1-0.c | 105 ++++++++++++++++++ >> 1 file changed, 105 insertions(+) >> >> diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c >> index 1219a25ec55b..b6d5a27b94a6 100644 >> --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c >> +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c >> @@ -324,6 +324,111 @@ csiphy_lane_regs lane_regs_sm8250[] = { >> {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, >> }; >> >> +/* GEN2 1.2 2PH */ >> +static const struct >> +csiphy_lane_regs lane_regs_sm8550[] = { > > This should sparkle warnings. > > There is no user of it. You must organize your patches in logical junks. > Adding piece of structure without users is not a logical chunk. > > Best regards, > Krzysztof > Hi Krzysztof, Sure, will move this patch to "media: qcom: camss: Add sm8550 support", It is used in below code. > + case CAMSS_8550: > + regs->lane_regs = &lane_regs_sm8550[0]; > + regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8550); > + regs->offset = 0x1000; > + break; > default: Thanks, Depeng