From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mta1.migadu.com (out-160.mta1.migadu.com [95.215.58.160]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B13A8376A1B for ; Wed, 23 Sep 2026 14:30:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.160 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790173852; cv=none; b=VqbPnX6VhcXrWA8f9+cEwODiT6Rxba8sqBSk5lyBto1KQMA97r29AsU1kmIUw3HyTYhxu96ZYkZK8RC4shDfREnVgc8d+IWWPdzpgXeMzdMt5wVHQVkXvTUrx9NfJsHfYorQfFlMUCFG5jze2Rih5pqG26a1Yaxesy4XJp5G5n4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790173852; c=relaxed/simple; bh=b6ZBHffUU1kQW7t5E42xHCf7V8PqDJJijxTKcey/Qe0=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=BG8T3BoGTsjW+8bRKJw/xsox/G1ucE1xeOC2ckqMsL6JdigNtn45sIVDvuLBMXS+A4RVWJ20vcLN/ZoH64AncrlaDCGHE14KnBjaH7fmFR95e79GCe86cV8nStzjrusvBAMSLhgF6rcrHd54b4IBgc6RKIPgozJJnSKchZi/RUw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=CEFw0t+s; arc=none smtp.client-ip=95.215.58.160 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="CEFw0t+s" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=b6ZBHffUU1kQW7t5E42xHCf7V8PqDJJijxTKcey/Qe0=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1790173847; v=1; x=1790778647; b=CEFw0t+sSSYZ18s8Ns83dY9xXsLJlRcST2FEeiCltERMntl4VCTroZnrsX82+KRsxhmGoCB3 xzcUbgPcKVPEusIOuKaLjv/gbVZD4VP6nVXaydLO1DPq+AqWnxQx01/+GNgx/XaxW9hknHpmXvY RJv4/okjP4eCEnHI5++X/J1A= X-Envelope-To: linux-kernel@vger.kernel.org Received: by smtp.migadu.com with ESMTPS id 08c87b445fde2718; Wed, 23 Sep 2026 14:30:47 +0000 X-Mizu-Trace-ID: 08c87b445fde2718 X-Migadu-Flow: FLOW_OUT Message-ID: <2adefc6f-328c-4683-8cba-091d9f3425ab@linux.dev> Date: Wed, 23 Sep 2026 16:30:42 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] fpga: region: Add support for FPGA region variants To: Xu Yilun Cc: Moritz Fischer , Xu Yilun , Tom Rix , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Saravana Kannan , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org References: <417b510f-0f6d-4695-97f5-3fc19b9377b9@linux.dev> <9d4af487-69a7-4a0d-9335-35c3a057de54@linux.dev> <4dbdb52e-1b28-432e-a3a7-ad9c44f17d27@linux.dev> <8848432d-45b0-4efe-adf3-adfb64fe0899@linux.dev> <11b1a792-f8b1-4fce-8a7a-8352149febcf@linux.dev> Content-Language: en-US From: Marco Pagani In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18/09/2026 19:36, Xu Yilun wrote: > On Fri, Sep 18, 2026 at 05:07:07PM +0200, Marco Pagani wrote: >> >> Hi Yilun, >> >> Is it okay with you if I CC the DT people to ask for an opinion? > > Of course. It's good to know in which case could a DTO be applied. > > But to be clear, I think that only affects how we accept and apply the > image-DTO pair. For now, I basically don't want a varient selection > interface. Hello Rob, Saravana, Krzysztof, Conor, I'm CC-ing you on this thread as OF/DT maintainers to kindly ask for your input on this debate we are having about how to implement userspace FPGA reconfiguration, an important feature currently lacking in mainline kernel. https://lore.kernel.org/all/20260608164247.1998417-1-marco.pagani@linux.dev To recap: modern FPGAs allow portions of the fabric to be reconfigured at runtime to dynamically swap soft IPs. Usually, these IPs are connected through a non-discoverable on-chip bus like AMBA AXI. >From a kernel perspective, this means the FPGA device configuration image (bitstream) must be paired with a DT fragment that describes the new topology. In this thread, we are essentially debating between two approaches for implementing FPGA userspace reconfiguration at runtime: - Statically defined Variants (this RFC): Userspace can change FPGA configuration by selecting from a pre-validated set of variants (DT fragments) baked into the base DT. - Runtime DTOs (Nava's RFC): Userspace can change FPGA configuration by loading DTOs that are validated at runtime. Could you share your thoughts on this? In your opinion, which one of these two approaches aligns better with the DT infrastructure and general kernel design philosophy? Thanks, Marco