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Tue, 17 Mar 2026 22:48:01 -0700 (PDT) Message-ID: <2b1c6372-7fba-47db-89f6-c376b4a1dbdd@gmail.com> Date: Wed, 18 Mar 2026 11:18:20 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: tessolveupstream@gmail.com Subject: Re: [PATCH v2 1/2] dt-bindings: display: bridge: ti, sn65dsi83: Add dual-link video mode property To: Luca Ceresoli , andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, marex@denx.de, valentin@compulab.co.il, philippe.schenker@toradex.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel References: <20260312043743.261475-1-tessolveupstream@gmail.com> <20260312043743.261475-2-tessolveupstream@gmail.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12-03-2026 21:16, Luca Ceresoli wrote: > Hello Sudarshan, > > On Thu Mar 12, 2026 at 5:37 AM CET, Sudarshan Shetty wrote: >> Add a new optional device tree property `ti,dual-link-video-mode` >> to indicate that the bridge should configure the device for >> dual-link LVDS video mode. >> >> In dual-link configurations, some panels require the horizontal >> timing parameters to be adjusted before programming them into >> the device. In such cases, the horizontal timing values must be >> divided by two when operating in dual-link mode. >> >> Signed-off-by: Sudarshan Shetty > > This is not needed. Dual link mode is already implied by the presence of > port@2 and port@3. > > Also, the driver implements that already, and handles even/odd pixel swap > as well: > > ctx->lvds_dual_link = false; > ctx->lvds_dual_link_even_odd_swap = false; > if (model != MODEL_SN65DSI83) { > struct device_node *port2, *port3; > int dual_link; > > port2 = of_graph_get_port_by_id(dev->of_node, 2); > port3 = of_graph_get_port_by_id(dev->of_node, 3); > dual_link = drm_of_lvds_get_dual_link_pixel_order(port2, port3); > of_node_put(port2); > of_node_put(port3); > > if (dual_link == DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS) { > ctx->lvds_dual_link = true; > /* Odd pixels to LVDS Channel A, even pixels to B */ > ctx->lvds_dual_link_even_odd_swap = false; > } else if (dual_link == DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS) { > ctx->lvds_dual_link = true; > /* Even pixels to LVDS Channel A, odd pixels to B */ > ctx->lvds_dual_link_even_odd_swap = true; > } > } > > (https://elixir.bootlin.com/linux/v7.0-rc3/source/drivers/gpu/drm/bridge/ti-sn65dsi83.c#L895-L916) > Thanks for the clarification. For reference, the DTS currently used on our platform already describes the two LVDS output ports as follows: lvds_bridge: bridge@2c { compatible = "ti,sn65dsi84"; reg = <0x2c>; enable-gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>; ti,dual-link-video-mode; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; sn65dsi84_in: endpoint { data-lanes = <1 2 3 4>; remote-endpoint = <&mdss_dsi0_out>; }; }; port@2 { reg = <2>; sn65dsi84_out_a: endpoint { data-lanes = <1 2 3 4>; remote-endpoint = <&lvds_panel_out_a>; }; }; port@3 { reg = <3>; sn65dsi84_out_b: endpoint { data-lanes = <1 2 3 4>; remote-endpoint = <&lvds_panel_out_b>; }; }; }; > Luca > > -- > Luca Ceresoli, Bootlin > Embedded Linux and Kernel engineering > https://bootlin.com