From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4B8491A00FA for ; Fri, 2 May 2025 06:56:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746168993; cv=none; b=HnEMJi7eGDppxB3Gp3MUnH7cdxYKc3Qd+eA0hS1DB+285aFOTVACVh9gSzYy7znHF796VED7cLESJHIe1525X24EDrXbBz0KYtgV2NkfnbIxl3dsboxFhoRriHSj2osnblm1BTC568fqXIT5l27DoWzuoNZs5lX+ASYmcCtaHJ4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746168993; c=relaxed/simple; bh=SzRhrQdcDxCEz/849qucodLKygqUqFWabZHxqrDhy6w=; h=Message-ID:Date:MIME-Version:Subject:To:References:From: In-Reply-To:Content-Type; b=KyBwGEE/qMHKUWscjR1Fe4nPJlG3XliwoSX8O16q7P5YBFRnM2fnp9Hw+Xr2uyReVAJY9JLmr62AWOHHVtclF+bkTJFkKNI6oTOwq+gXgLrwkCzfU5LgX+mDNf+aIcAK8m1ZhOcEXajsY+lqZxhy0/3ghWVz25CVPtfBaTgS4/4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6661D106F; Thu, 1 May 2025 23:56:22 -0700 (PDT) Received: from [10.163.80.122] (unknown [10.163.80.122]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 313E53F5A1; Thu, 1 May 2025 23:56:25 -0700 (PDT) Message-ID: <2b39dd04-9b3a-4b50-99d5-e3a45cc3f374@arm.com> Date: Fri, 2 May 2025 12:26:22 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 8/9] coresight: Make clock sequence consistent To: Leo Yan , Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com References: <20250423151726.372561-1-leo.yan@arm.com> <20250423151726.372561-9-leo.yan@arm.com> Content-Language: en-US From: Anshuman Khandual In-Reply-To: <20250423151726.372561-9-leo.yan@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 4/23/25 20:47, Leo Yan wrote: > Since atclk is enabled after pclk during the probe phase, this commit > maintains the same sequence for the runtime resume flow. which is also the exact opposite of the suspend flow as expected. > > Signed-off-by: Leo Yan > --- > drivers/hwtracing/coresight/coresight-funnel.c | 6 +++--- > drivers/hwtracing/coresight/coresight-replicator.c | 6 +++--- > drivers/hwtracing/coresight/coresight-stm.c | 6 +++--- > drivers/hwtracing/coresight/coresight-tpiu.c | 6 +++--- > 4 files changed, 12 insertions(+), 12 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c > index 173fee3aaa6e..62e5125c37ad 100644 > --- a/drivers/hwtracing/coresight/coresight-funnel.c > +++ b/drivers/hwtracing/coresight/coresight-funnel.c > @@ -296,11 +296,11 @@ static int funnel_runtime_resume(struct device *dev) > { > struct funnel_drvdata *drvdata = dev_get_drvdata(dev); > > - if (drvdata && !IS_ERR(drvdata->atclk)) > - clk_prepare_enable(drvdata->atclk); > - > if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) > clk_prepare_enable(drvdata->pclk); > + > + if (drvdata && !IS_ERR(drvdata->atclk)) > + clk_prepare_enable(drvdata->atclk); > return 0; > } > #endif > diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c > index 7250a2174145..56b03e6d8336 100644 > --- a/drivers/hwtracing/coresight/coresight-replicator.c > +++ b/drivers/hwtracing/coresight/coresight-replicator.c > @@ -334,11 +334,11 @@ static int replicator_runtime_resume(struct device *dev) > { > struct replicator_drvdata *drvdata = dev_get_drvdata(dev); > > - if (drvdata && !IS_ERR(drvdata->atclk)) > - clk_prepare_enable(drvdata->atclk); > - > if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) > clk_prepare_enable(drvdata->pclk); > + > + if (drvdata && !IS_ERR(drvdata->atclk)) > + clk_prepare_enable(drvdata->atclk); > return 0; > } > #endif > diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c > index 89e90e7f54de..f17986edac00 100644 > --- a/drivers/hwtracing/coresight/coresight-stm.c > +++ b/drivers/hwtracing/coresight/coresight-stm.c > @@ -969,11 +969,11 @@ static int stm_runtime_resume(struct device *dev) > { > struct stm_drvdata *drvdata = dev_get_drvdata(dev); > > - if (drvdata && !IS_ERR(drvdata->atclk)) > - clk_prepare_enable(drvdata->atclk); > - > if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) > clk_prepare_enable(drvdata->pclk); > + > + if (drvdata && !IS_ERR(drvdata->atclk)) > + clk_prepare_enable(drvdata->atclk); > return 0; > } > #endif > diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c > index b3d0db0e53b9..4701b34778bd 100644 > --- a/drivers/hwtracing/coresight/coresight-tpiu.c > +++ b/drivers/hwtracing/coresight/coresight-tpiu.c > @@ -218,11 +218,11 @@ static int tpiu_runtime_resume(struct device *dev) > { > struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); > > - if (drvdata && !IS_ERR(drvdata->atclk)) > - clk_prepare_enable(drvdata->atclk); > - > if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) > clk_prepare_enable(drvdata->pclk); > + > + if (drvdata && !IS_ERR(drvdata->atclk)) > + clk_prepare_enable(drvdata->atclk); > return 0; > } > #endif These also matches the clock initialization sequence during probe() via the new helper coresight_get_enable_clocks(). LGTM. Reviewed-by: Anshuman Khandual