From: Florian Fainelli <florian.fainelli@broadcom.com>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@broadcom.com>,
Huacai Chen <chenhuacai@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Serge Semin <fancer.lancer@gmail.com>,
Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 01/10] MIPS: smp: Make IPI interrupts scalable
Date: Wed, 11 Sep 2024 20:47:20 -0700 [thread overview]
Message-ID: <2ba9dfa8-2c54-43bd-aa41-8ab87a7b2dc8@broadcom.com> (raw)
In-Reply-To: <20240908-b4-mips-ipi-improvements-v5-1-be8617dd2e53@flygoat.com>
On 9/8/2024 3:20 AM, Jiaxun Yang wrote:
> Define enum ipi_message_type as other architectures did to
> allow easy extension to number of IPI interrupts, fiddle
> around platform IPI code to adopt to the new infra, add
> extensive BUILD_BUG_ON on IPI numbers to ensure future
> extensions won't break existing platforms.
>
> IPI related stuff are pulled to asm/ipi.h to avoid include
> linux/interrupt.h in asm/smp.h.
>
> Tested-by: Serge Semin <fancer.lancer@gmail.com>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> arch/mips/cavium-octeon/smp.c | 111 ++++++++++--------------------
> arch/mips/fw/arc/init.c | 1 -
> arch/mips/include/asm/ipi.h | 34 ++++++++++
> arch/mips/include/asm/octeon/octeon.h | 2 +
> arch/mips/include/asm/smp-ops.h | 8 +--
> arch/mips/include/asm/smp.h | 41 +++++------
> arch/mips/kernel/smp-bmips.c | 43 ++++++------
For smp-bmips.c:
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
--
Florian
next prev parent reply other threads:[~2024-09-12 3:47 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-08 10:20 [PATCH v5 00/10] MIPS: IPI Improvements Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 01/10] MIPS: smp: Make IPI interrupts scalable Jiaxun Yang
2024-09-12 3:47 ` Florian Fainelli [this message]
2024-09-08 10:20 ` [PATCH v5 02/10] MIPS: smp: Manage IPI interrupts as percpu_devid interrupts Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 03/10] MIPS: smp: Provide platform IPI virq & domain hooks Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 04/10] MIPS: Move mips_smp_ipi_init call after prepare_cpus Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 05/10] MIPS: smp: Implement IPI stats Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 06/10] irqchip/irq-mips-gic: Switch to ipi_mux Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 07/10] MIPS: Implement get_mips_sw_int hook Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 08/10] MIPS: GIC: Implement get_sw_int hook Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 09/10] irqchip/irq-mips-cpu: Rework software IRQ handling flow Jiaxun Yang
2024-09-08 10:20 ` [PATCH v5 10/10] MIPS: smp-mt: Rework IPI functions Jiaxun Yang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2ba9dfa8-2c54-43bd-aa41-8ab87a7b2dc8@broadcom.com \
--to=florian.fainelli@broadcom.com \
--cc=bcm-kernel-feedback-list@broadcom.com \
--cc=chenhuacai@kernel.org \
--cc=fancer.lancer@gmail.com \
--cc=jiaxun.yang@flygoat.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=paulburton@kernel.org \
--cc=tglx@linutronix.de \
--cc=tsbogend@alpha.franken.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®