From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934182AbcIOHsi (ORCPT ); Thu, 15 Sep 2016 03:48:38 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:36933 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S934145AbcIOHsc (ORCPT ); Thu, 15 Sep 2016 03:48:32 -0400 Subject: Re: [PATCH v3 11/14] ARM: DT: STiH410: Enable synchronous clock mode for video clocks To: , Rob Herring , Mark Rutland , Ian Campbell , Kumar Gala , Srinivas Kandagatla , Russell King , Michael Turquette , Stephen Boyd , Olivier Bideau , Geert Uytterhoeven , Sebastian Hesselbarth , Andrzej Hajda , Pankaj Dev , Dinh Nguyen , Arnd Bergmann , Thierry Reding References: <1472473626-15398-1-git-send-email-gabriel.fernandez@st.com> <1472473626-15398-12-git-send-email-gabriel.fernandez@st.com> CC: , , , , , Lee Jones , Peter Griffin , , , , Gabriel Fernandez From: Patrice Chotard Message-ID: <2bd0942f-9525-5819-8edb-b561f5996583@st.com> Date: Thu, 15 Sep 2016 09:47:41 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <1472473626-15398-12-git-send-email-gabriel.fernandez@st.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.48.1.66] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-09-15_04:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/29/2016 02:27 PM, gabriel.fernandez@st.com wrote: > From: Gabriel Fernandez > > This patch enables the synchronous clock mode for video clocks > on STiH410 board. > > Signed-off-by: Olivier Bideau > Signed-off-by: Gabriel Fernandez > Acked-by: Peter Griffin > --- > arch/arm/boot/dts/stih410-clock.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi > index aec2aa7..8598eff 100644 > --- a/arch/arm/boot/dts/stih410-clock.dtsi > +++ b/arch/arm/boot/dts/stih410-clock.dtsi > @@ -277,7 +277,7 @@ > > clk_s_d2_flexgen: clk-s-d2-flexgen { > #clock-cells = <1>; > - compatible = "st,flexgen"; > + compatible = "st,flexgen-video", "st,flexgen"; > > clocks = <&clk_s_d2_quadfs 0>, > <&clk_s_d2_quadfs 1>, > Hi Gabriel Applied on STi tree for v4.9 Thanks