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Sat, 13 Jul 2024 19:12:17 +0000 Message-ID: <2c539dc6-bfb1-4dbe-8fbd-4dc04984f473@marvell.com> Date: Sun, 14 Jul 2024 00:42:06 +0530 User-Agent: Mozilla Thunderbird Subject: [PATCH v3 04/12] PCI: brcmstb: Use bridge reset if available To: Jim Quinlan , linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , Cyril Brulebois , Stanimir Varbanov , Krzysztof Kozlowski , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com Cc: Florian Fainelli , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Philipp Zabel , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , open list References: <20240710221630.29561-1-james.quinlan@broadcom.com> <20240710221630.29561-5-james.quinlan@broadcom.com> Content-Language: en-US From: Amit Singh Tomar In-Reply-To: <20240710221630.29561-5-james.quinlan@broadcom.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: PN2PR01CA0181.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c01:e8::7) To MW4PR18MB5084.namprd18.prod.outlook.com (2603:10b6:303:1a7::8) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MW4PR18MB5084:EE_|SJ0PR18MB4090:EE_ X-MS-Office365-Filtering-Correlation-Id: e3c07d97-269d-4cca-9091-08dca36fb62a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|366016|1800799024|921020; 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Otherwise, continue to use the legacy method to > reset the bridge. > > Signed-off-by: Jim Quinlan > --- > drivers/pci/controller/pcie-brcmstb.c | 22 +++++++++++++++++----- > 1 file changed, 17 insertions(+), 5 deletions(-) > > diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c > index c257434edc08..92816d8d215a 100644 > --- a/drivers/pci/controller/pcie-brcmstb.c > +++ b/drivers/pci/controller/pcie-brcmstb.c > @@ -265,6 +265,7 @@ struct brcm_pcie { > enum pcie_type type; > struct reset_control *rescal; > struct reset_control *perst_reset; > + struct reset_control *bridge; > int num_memc; > u64 memc_size[PCIE_BRCM_MAX_MEMC]; > u32 hw_rev; > @@ -732,12 +733,19 @@ static void __iomem *brcm7425_pcie_map_bus(struct pci_bus *bus, > > static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val) > { > - u32 tmp, mask = RGR1_SW_INIT_1_INIT_GENERIC_MASK; > - u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT; > + if (pcie->bridge) { > + if (val) > + reset_control_assert(pcie->bridge); > + else > + reset_control_deassert(pcie->bridge); > + } else { > + u32 tmp, mask = RGR1_SW_INIT_1_INIT_GENERIC_MASK; > + u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT; > > - tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); > - tmp = (tmp & ~mask) | ((val << shift) & mask); > - writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); > + tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); > + tmp = (tmp & ~mask) | ((val << shift) & mask); > + writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); > + } > } > > static void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val) > @@ -1621,6 +1629,10 @@ static int brcm_pcie_probe(struct platform_device *pdev) > if (IS_ERR(pcie->perst_reset)) > return PTR_ERR(pcie->perst_reset); > > + pcie->bridge = devm_reset_control_get_optional_exclusive(&pdev->dev, "bridge"); > + if (IS_ERR(pcie->bridge)) > + return PTR_ERR(pcie->bridge); How about using "dev_err_probe," which utilizes "dev_err" for logging error messages and recording the deferred probe reason? > + > ret = clk_prepare_enable(pcie->clk); > if (ret) { > dev_err(&pdev->dev, "could not enable clock\n");