From: Neil Armstrong <neil.armstrong@linaro.org>
To: Konrad Dybcio <konrad.dybcio@linaro.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/6] arm64: dts: qcom: sm8350: add ports subnodes in usb1 qmpphy node
Date: Thu, 4 May 2023 17:39:18 +0200 [thread overview]
Message-ID: <2c7c2fe8-85c4-581b-c34a-561652d4de4c@linaro.org> (raw)
In-Reply-To: <4eda7a33-991c-598e-0531-13959be0a912@linaro.org>
On 04/05/2023 14:57, Neil Armstrong wrote:
> On 04/05/2023 09:38, Konrad Dybcio wrote:
>>
>>
>> On 3.05.2023 15:10, Neil Armstrong wrote:
>>> Add the USB3+DP Combo QMP PHY port subnodes in the SM8350 SoC DTSI
>>> to avoid duplication in the devices DTs.
>>>
>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>> ---
>>> arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++
>>> 1 file changed, 26 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
>>> index ebcb481571c2..d048f4d35c89 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
>>> @@ -2149,6 +2149,32 @@ usb_1_qmpphy: phy@88e9000 {
>>> #phy-cells = <1>;
>>> status = "disabled";
>>> +
>>> + ports {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + port@0 {
>>> + reg = <0>;
>>> +
>>> + usb_1_qmpphy_out: endpoint {
>>> + };
>>> + };
>>> +
>>> + port@1 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + reg = <1>;
>>> +
>>> + usb_1_qmpphy_usb_ss_in: endpoint@0 {
>>> + reg = <0>;
>>> + };
>>> +
>>> + usb_1_qmpphy_dp_in: endpoint@1 {
>>> + reg = <1>;
>>> + };
>> Shouldn't dp be a separate port@2?
>
> Probably yes, but it should be the same issue for makena, but on makena
> we do not describe the USB SS and HS links separately, but only a single
> port for QMP input has been defined in the bindings.
Forget my comment, there's the 2 ports in the bindings, I was confused
after the bindings reviews...
Neil
>
> Neil
>
>>
>> Konrad
>>> + };
>>> + };
>>> };
>>> usb_2_qmpphy: phy-wrapper@88eb000 {
>>>
>
next prev parent reply other threads:[~2023-05-04 15:39 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-03 13:10 [PATCH 0/6] arm64: qcom: sm84[34]50: enable DP altmode on USB-C Connector Neil Armstrong
2023-05-03 13:10 ` [PATCH 1/6] arm64: dts: qcom: sm8350: add ports subnodes in usb1 qmpphy node Neil Armstrong
2023-05-04 7:38 ` Konrad Dybcio
2023-05-04 12:57 ` Neil Armstrong
2023-05-04 15:39 ` Neil Armstrong [this message]
2023-05-03 13:10 ` [PATCH 2/6] arm64: dts: qcom: sm8450: " Neil Armstrong
2023-05-03 13:10 ` [PATCH 3/6] arm64: dts: qcom: sm8350-hdk: Add QMP & DP to SuperSpeed graph Neil Armstrong
2023-05-03 16:28 ` Krzysztof Kozlowski
2023-05-04 6:53 ` Konrad Dybcio
2023-05-04 12:55 ` Neil Armstrong
2023-05-03 13:10 ` [PATCH 4/6] arm64: dts: qcom: sm8450-hdk: " Neil Armstrong
2023-05-04 6:54 ` Konrad Dybcio
2023-05-03 13:10 ` [PATCH 5/6] arm64: defconfig: enable FSA4480 driver as module Neil Armstrong
2023-05-03 16:29 ` Krzysztof Kozlowski
2023-05-03 13:10 ` [PATCH 6/6] qcom: pmic_glink: enable altmode for SM8450 Neil Armstrong
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