From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2CE243E3C7D for ; Wed, 27 May 2026 09:36:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779874594; cv=none; b=fyqN2bS7jxjnJvSwYwtsuZPokDPKkCNoRrT52cd95nc3zc4rdVX1UAcxH8+A6aBSMq/sDIUtrSo/2bsQiYOG96OqSqZtuegx4ze6S3Wr8irojNMXYZ6EhjWpZl5Baf7tJv9i4RGKZoGqW4gMziygQXTOQbvRiPzTaJXGdoZ67rs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779874594; c=relaxed/simple; bh=wdVbheEw9Law28VUx8AnDj9z6KfD0SUJWllhcdX+ZGo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=LDI8c6aV/Nq9010bw8ZUkK1twzbLKuIp+r3Zt/i9+w8PZjXyw6i40nI5SSQmPz7t8QrNabYXzXZQ5eL+5F/M/ZsghfXPBR071MCP/Mwen8ad54GVqQH6XHN+eaMKXyrJpkADXeyOrQFQ3W0lrNdM7+ISNqGFtVohK1o9S+obWb0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=MIBBoiTk; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="MIBBoiTk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1779874594; x=1811410594; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wdVbheEw9Law28VUx8AnDj9z6KfD0SUJWllhcdX+ZGo=; b=MIBBoiTkVTnXRNtDiajLQlfzFnvDWqUdzU1vXYnc1mGM2Irlf5/Cof3c WKDUd1XIVZ5ij4XqEV/5feBPRIMyrz9bHIHZLVxD+HHk1HFzV1Dqp8dYi mr+R4RsQ4cKDzTLR4VUCdXW3xyyNztqh2J8Y34pov0hfD2TsMjyxtB7Hd DS/nBX8GTFWJ8Lh508PkRpIJyOOzi8iXivEcne8aOKxyrWgfCI6Bcd83U OQGnIb36UtgwLz9wRBCAi/yqtAU2naT6cObzuuUl6oZF9kQ5oqfLAnNvS +sN8aY1cJJgvudJMuCTceEc1Zu56Y9VxrL4s7RMNN1HLU5ZJ8nYP8R7nH A==; X-CSE-ConnectionGUID: ge52eYbmQmaVATUvlToT+w== X-CSE-MsgGUID: fCOpEVQbSYe9uxS82u+S5A== X-IronPort-AV: E=McAfee;i="6800,10657,11798"; a="91005653" X-IronPort-AV: E=Sophos;i="6.24,171,1774335600"; d="scan'208";a="91005653" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 May 2026 02:36:33 -0700 X-CSE-ConnectionGUID: cTah8q1bSdGmZBmylQJ5NA== X-CSE-MsgGUID: ayRH9r6rQM23vcaGiAWnYg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,171,1774335600"; d="scan'208";a="241139970" Received: from chenyu-dev.sh.intel.com ([10.239.62.107]) by orviesa006.jf.intel.com with ESMTP; 27 May 2026 02:36:29 -0700 From: Chen Yu To: tony.luck@intel.com, reinette.chatre@intel.com Cc: x86@kernel.org, linux-kernel@vger.kernel.org, tglx@kernel.org, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, Dave.Martin@arm.com, james.morse@arm.com, babu.moger@amd.com, fenghuay@nvidia.com, Chen Yu Subject: [RFC PATCH 2/6] x86/resctrl: Parse ACPI CMRC table Date: Wed, 27 May 2026 17:27:29 +0800 Message-Id: <2ccfb05f576ff9a30faf5ff7d6c4adafea07fdb6.1779872016.git.yu.c.chen@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The CMRC (Cache Monitoring Registers for CPU Agents Description) sub-table of ERDT describes the MMIO registers used to read cache monitoring counters (e.g. LLC occupancy) for an RMD. Parse each CMRC sub-table, ioremap its register window, and save the CMRC pointer in the corresponding ERDT domain entry so that later monitoring code can read the counters via MMIO. Suggested-by: Tony Luck Signed-off-by: Chen Yu --- arch/x86/kernel/cpu/resctrl/erdt.c | 40 ++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/erdt.c b/arch/x86/kernel/cpu/resctrl/erdt.c index 2813f48f1411..30b7dfd99086 100644 --- a/arch/x86/kernel/cpu/resctrl/erdt.c +++ b/arch/x86/kernel/cpu/resctrl/erdt.c @@ -38,6 +38,7 @@ static bool erdt_available; static DEFINE_XARRAY(erdt_domain_xa); /* Indexed by L3 cache ID */ #define ERDT_VALID_VERSION 1 +#define CMRC_VALID_INDEX_FUNC_VERSION 1 static u32 valid_subtbl_mask; @@ -159,6 +160,7 @@ static void erdt_iounmap_domain(struct erdt_domain_info *domain) static void cleanup_one_domain(struct erdt_domain_info *d) { erdt_iounmap_domain(d); + kfree(d->cmrc); kfree(d); } @@ -171,6 +173,40 @@ static __init bool cacd_init(struct erdt_domain_info *d, return *l3_cache_id != -1; } +static __init bool cmrc_init(struct erdt_domain_info *d, struct acpi_subtbl_hdr_16 *subtbl) +{ + struct acpi_erdt_cmrc *cmrc = (struct acpi_erdt_cmrc *)subtbl; + + if (subtbl->length < sizeof(*cmrc)) { + pr_warn(FW_BUG "Truncated CMRC subtable\n"); + return false; + } + + if (cmrc->index_fn != CMRC_VALID_INDEX_FUNC_VERSION) { + pr_info("Unknown CMRC index function %d\n", cmrc->index_fn); + return false; + } + + if (!cmrc->clump_size) { + pr_warn(FW_BUG "CMRC clump_size is zero\n"); + return false; + } + + d->base[ERDT_MMIO_CMRC_BASE] = erdt_ioremap_checked(cmrc->cmt_reg_base, + cmrc->cmt_reg_size, "CMRC base"); + if (!d->base[ERDT_MMIO_CMRC_BASE]) + return false; + + d->cmrc = kmemdup(cmrc, subtbl->length, GFP_KERNEL); + if (!d->cmrc) { + iounmap(d->base[ERDT_MMIO_CMRC_BASE]); + d->base[ERDT_MMIO_CMRC_BASE] = NULL; + return false; + } + + return true; +} + static __init bool parse_rmdd_entry(struct acpi_subtbl_hdr_16 *rmdd_hdr) { struct acpi_erdt_rmdd *rmdd; @@ -219,6 +255,10 @@ static __init bool parse_rmdd_entry(struct acpi_subtbl_hdr_16 *rmdd_hdr) if (cacd_init(domain_info, subtbl, &l3_cache_id)) subtbl_mask |= BIT(ACPI_ERDT_TYPE_CACD); break; + case ACPI_ERDT_TYPE_CMRC: + if (cmrc_init(domain_info, subtbl)) + subtbl_mask |= BIT(ACPI_ERDT_TYPE_CMRC); + break; default: break; } -- 2.25.1