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[188.141.3.146]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4310adf6eabsm2191990f8f.38.2025.12.16.19.29.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 Dec 2025 19:29:00 -0800 (PST) Message-ID: <2ce4e296-701a-4354-8988-87525769ccac@linaro.org> Date: Wed, 17 Dec 2025 03:29:00 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 1/5] media: dt-bindings: Add CAMSS device for Kaanapali To: Vijay Kumar Tumati , Vladimir Zapolskiy , Konrad Dybcio , Hangxiang Ma , Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , Mauro Carvalho Chehab Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com, Jingyi Wang , Atiya Kailany References: <20251113-add-support-for-camss-on-kaanapali-v6-0-1e6038785a8e@oss.qualcomm.com> <20251113-add-support-for-camss-on-kaanapali-v6-1-1e6038785a8e@oss.qualcomm.com> <37d0f89f-69be-45a7-90fa-347d6a3800bf@oss.qualcomm.com> <2d7ac7e8-ab69-44a6-b732-3657abf3a5a6@oss.qualcomm.com> From: Bryan O'Donoghue Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 17/12/2025 00:46, Vijay Kumar Tumati wrote: >> I don't understand a reason why to do worse for the upstream, when >> there is >> a clear and feasible alternative not to do worse, thus my >> misunderstanding >> and my grief for upstream CAMSS are my concerns. >> > Thanks for the comments, Vladimir. Bryan's and Krzysztof's argument was > that the bindings are required to describe the full hardware regardless > of the driver support and either way not modifiable in the future, so > they preferred having the HW properties of the key functional blocks in > the bindings. And we were specifically asked to add the properties into > this node in this patch series. Having said that, my knowledge on how > the bindings are handled upstream in the long run as the requirements > evolve, is limited. So I will look for some expert advise from Bryan > here as he strongly advised for these. Thanks again. I see no technical reason why describing the whole hardware block precludes any further work. How could it ? Anyway, I'll repeat my ask to describe: - The full register set - The interconnects - The clocks and resets - The SIDs --- bod