From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06592C433F5 for ; Sat, 26 Mar 2022 01:56:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230172AbiCZB6T (ORCPT ); Fri, 25 Mar 2022 21:58:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46298 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230080AbiCZB6S (ORCPT ); Fri, 25 Mar 2022 21:58:18 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C8842C1C9B; Fri, 25 Mar 2022 18:56:38 -0700 (PDT) X-UUID: 13a92cc6e8ee4622a5c2a0918b44ec45-20220326 X-UUID: 13a92cc6e8ee4622a5c2a0918b44ec45-20220326 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1780893580; Sat, 26 Mar 2022 09:56:28 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Sat, 26 Mar 2022 09:56:27 +0800 Received: from mhfsdcap04 (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 26 Mar 2022 09:56:26 +0800 Message-ID: <2ceb84aec51252cfb254525900480cc380fc2c03.camel@mediatek.com> Subject: Re: [PATCH v4 2/2] phy: mediatek: Add PCIe PHY driver From: Jianjun Wang To: AngeloGioacchino Del Regno , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Matthias Brugger , "Chen-Yu Tsai" , Krzysztof Kozlowski CC: Wei-Shun Chang , , , , , , , , , , , Date: Sat, 26 Mar 2022 09:56:26 +0800 In-Reply-To: References: <20220323065608.27426-1-jianjun.wang@mediatek.com> <20220323065608.27426-3-jianjun.wang@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2022-03-25 at 15:15 +0100, AngeloGioacchino Del Regno wrote: > Il 23/03/22 07:56, Jianjun Wang ha scritto: > > Add PCIe GEN3 PHY driver support on MediaTek chipsets. > > > > Signed-off-by: Jianjun Wang > > --- > > drivers/phy/mediatek/Kconfig | 11 ++ > > drivers/phy/mediatek/Makefile | 1 + > > drivers/phy/mediatek/phy-mtk-pcie.c | 272 > > ++++++++++++++++++++++++++++ > > 3 files changed, 284 insertions(+) > > create mode 100644 drivers/phy/mediatek/phy-mtk-pcie.c > > > > ..snip.. > > > diff --git a/drivers/phy/mediatek/phy-mtk-pcie.c > > b/drivers/phy/mediatek/phy-mtk-pcie.c > > new file mode 100644 > > index 000000000000..44a2ad8d324e > > --- /dev/null > > +++ b/drivers/phy/mediatek/phy-mtk-pcie.c > > @@ -0,0 +1,272 @@ > > ..snip.. > > > +/** > > + * struct mtk_pcie_phy - PCIe phy driver main structure > > + * @dev: pointer to device > > + * @phy: pointer to generic phy > > + * @sif_base: IO mapped register base address of system interface > > + * @data: pointer to SoC dependent data > > + * @sw_efuse_en: software eFuse enable status > > + * @efuse_glb_intr: internal resistor selection of TX bias current > > data > > + * @efuse: pointer to eFues data for each lane > > Oops! There's a typo! "eFues" => "eFuse" > > After fixing this typo, > > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> Thanks! > > P.S.: Many thanks for the kerneldoc documentation!!!! > > > + */ > > +struct mtk_pcie_phy { > > + struct device *dev; > > + struct phy *phy; > > + void __iomem *sif_base; > > + const struct mtk_pcie_phy_data *data; > > + > > + bool sw_efuse_en; > > + u32 efuse_glb_intr; > > + struct mtk_pcie_lane_efuse *efuse; > > +}; > >