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[2001:14bb:112:599c:156e:7946:30e2:6502]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54ad64fbde2sm1622300e87.123.2025.03.25.15.53.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 25 Mar 2025 15:53:30 -0700 (PDT) Message-ID: <2cfdf7f3-56a6-495e-83cf-1921a2e0ef8d@oss.qualcomm.com> Date: Wed, 26 Mar 2025 00:53:27 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/4] drm/dp: fallback to maximum when PWM bit count is zero To: Christopher Obbard , Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Johan Hovold , Rui Miguel Silva , Abel Vesa , devicetree@vger.kernel.org References: <20250325-wip-obbardc-qcom-t14s-oled-panel-v2-0-e9bc7c9d30cc@linaro.org> <20250325-wip-obbardc-qcom-t14s-oled-panel-v2-4-e9bc7c9d30cc@linaro.org> Content-Language: en-US From: Dmitry Baryshkov In-Reply-To: <20250325-wip-obbardc-qcom-t14s-oled-panel-v2-4-e9bc7c9d30cc@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: h2dLHP6xPsCmtsl5lhAVByZ8hHjRUZsQ X-Proofpoint-ORIG-GUID: h2dLHP6xPsCmtsl5lhAVByZ8hHjRUZsQ X-Authority-Analysis: v=2.4 cv=IKYCChvG c=1 sm=1 tr=0 ts=67e333ec cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=KKAkSRfTAAAA:8 a=wNHophStVnEZgpLo_8MA:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-25_10,2025-03-25_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 phishscore=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 spamscore=0 priorityscore=1501 adultscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503250152 On 25/03/2025 21:21, Christopher Obbard wrote: > Some eDP devices report DP_EDP_PWMGEN_BIT_COUNT as 0, but still provide > valid non-zero MIN and MAX values. This patch reworks the logic to > fallback to the max value in such cases, ensuring correct backlight PWM > configuration even when the bit count value is not explicitly set. I don't think this matches the eDP standard. It tells to use MIN if BIT_COUNT is less than MIN, if I understand it correctly. > > This improves compatibility with eDP panels (e.g. Samsung ATNA40YK20 > used on the Lenovo T14s Gen6 Snapdragon with OLED panel) which reports > DP_EDP_PWMGEN_BIT_COUNT as 0 but still provides valid non-zero MIN/MAX > values. > > Co-developed-by: Rui Miguel Silva > Signed-off-by: Rui Miguel Silva > Signed-off-by: Christopher Obbard > --- > drivers/gpu/drm/display/drm_dp_helper.c | 51 ++++++++++++++++++++++----------- > 1 file changed, 34 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > index da3c8521a7fa7d3c9761377363cdd4b44ab1106e..734b7b8e46394de21837cda6ca1b189413b25cd8 100644 > --- a/drivers/gpu/drm/display/drm_dp_helper.c > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > @@ -3964,7 +3964,7 @@ drm_edp_backlight_probe_max(struct drm_dp_aux *aux, struct drm_edp_backlight_inf > { > int fxp, fxp_min, fxp_max, fxp_actual, f = 1; > int ret; > - u8 pn, pn_min, pn_max; > + u8 pn, pn_min, pn_max, bl_caps; > > if (!bl->aux_set) > return 0; > @@ -3975,8 +3975,40 @@ drm_edp_backlight_probe_max(struct drm_dp_aux *aux, struct drm_edp_backlight_inf > aux->name, ret); > return -ENODEV; > } > - > pn &= DP_EDP_PWMGEN_BIT_COUNT_MASK; > + > + ret = drm_dp_dpcd_readb(aux, DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min); > + if (ret != 1) { > + drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap min: %d\n", > + aux->name, ret); > + return 0; > + } > + pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; > + > + ret = drm_dp_dpcd_readb(aux, DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max); > + if (ret != 1) { > + drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap max: %d\n", > + aux->name, ret); > + return 0; > + } > + pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; > + > + ret = drm_dp_dpcd_readb(aux, DP_EDP_BACKLIGHT_ADJUSTMENT_CAP, &bl_caps); > + if (ret != 1) { > + bl_caps = 0; > + drm_dbg_kms(aux->drm_dev, "%s: Failed to read backlight adjustment cap: %d\n", > + aux->name, ret); > + } > + > + /* > + * Some eDP panels report brightness byte count support, but the byte count > + * reading is 0 (e.g. Samsung ATNA40YK20) so in these cases use pn_max > + * for pn. > + */ > + if (!pn && (bl_caps & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) > + && pn_max) > + pn = pn_max; > + > bl->max = (1 << pn) - 1; > if (!driver_pwm_freq_hz) > return 0; > @@ -4003,21 +4035,6 @@ drm_edp_backlight_probe_max(struct drm_dp_aux *aux, struct drm_edp_backlight_inf > * - FxP is within 25% of desired value. > * Note: 25% is arbitrary value and may need some tweak. > */ > - ret = drm_dp_dpcd_readb(aux, DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min); > - if (ret != 1) { > - drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap min: %d\n", > - aux->name, ret); > - return 0; > - } > - ret = drm_dp_dpcd_readb(aux, DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max); > - if (ret != 1) { > - drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap max: %d\n", > - aux->name, ret); > - return 0; > - } > - pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; > - pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; > - > /* Ensure frequency is within 25% of desired value */ > fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4); > fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4); > -- With best wishes Dmitry