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Mon, 17 Aug 2026 22:52:05 -0700 (PDT) X-Received: by 2002:a05:6a00:4395:b0:845:31a6:d84d with SMTP id d2e1a72fcca58-84fde14ffecmr33704931b3a.7.1787032325493; Mon, 17 Aug 2026 22:52:05 -0700 (PDT) Received: from [10.219.56.166] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-851b4072c39sm1284034b3a.26.2026.08.17.22.51.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 Aug 2026 22:52:04 -0700 (PDT) Message-ID: <2d092339-a691-4539-8419-c9606ea35f68@oss.qualcomm.com> Date: Tue, 18 Aug 2026 11:21:55 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/15] accel/qda: Add DMA-backed GEM objects and memory manager integration To: Dmitry Baryshkov Cc: Oded Gabbay , Jonathan Corbet , Shuah Khan , Randy Dunlap , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , "Joerg Roedel (AMD)" , Will Deacon , Robin Murphy , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Sumit Semwal , =?UTF-8?Q?Christian_K=C3=B6nig?= , Bharath Kumar , Chenna Kesava Raju , srinivas.kandagatla@oss.qualcomm.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org, linux-arm-msm@vger.kernel.org, llvm@lists.linux.dev, iommu@lists.linux.dev, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org References: <20260817-qda-v2-v2-0-69a02e9090d4@oss.qualcomm.com> <20260817-qda-v2-v2-9-69a02e9090d4@oss.qualcomm.com> Content-Language: en-US From: Ekansh Gupta In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: gcQ0TomxTD3KwoQTHIfDhI6fAkPep8U- X-Authority-Analysis: v=2.4 cv=Gs5yPE1C c=1 sm=1 tr=0 ts=6a83f306 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=U_ymhupkC0DnaqHl0NQA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-GUID: gcQ0TomxTD3KwoQTHIfDhI6fAkPep8U- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE4MDA0MiBTYWx0ZWRfXyfYI6j5K1e9Q M/4ttvmgqpyH1wG+Hyv9IMthzc4XjzK5C2PTadPuRQhOyanfdvk3pT1NsWxpq5m6t+N7WiuFntO rrhftdhXglhlCMUrBN5QU+OR0WuY1E3BA1rMZqmiaH2vKv2eOe1EVa2K9ek64INh9KSUsr7d2AI W9QoI4x6ln/K7CDIGANh1ubFT0FOvRimsZD2b2MbNjT5B6pUI/kGeQPwLAIFRN1vOjqE4rVjfWl YMlodyU/Held0SZI4scxcVYomWNni/senO9lx8KNyrZrxFFyZDf/gdClrYWYiFRNa5OCt3Ru2UE 0TyNdVAk7sh3zAnD8opVrXQ0NmSa0i2ookLdvCjxF90jnaZTSDicw+1xAABRhbRDkssbJn1WKGv w4SqD1FYTTpY0dOlmsK4JXnaV2OzFzGkP735XYV78aJH+251BmwOisW88DE5m9VZfCiEKlHWXAz jxTKy5FL9lQA08BDQlA== X-Proofpoint-Spam-Info: AW1haW4tMjYwODE4MDA0MiBTYWx0ZWRfXzEYPlYQfvk94 I1NRGcTbL7iSCQUNMJZWA4x/HXeoh268DHum0bjzfR5J1/F0LSwCq2bR7r6TowHKxx0Eh0FIejI p8k/mb+tthKfCndk7W57X94U2y2ARII= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-17_04,2026-08-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 priorityscore=1501 clxscore=1015 suspectscore=0 phishscore=0 adultscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608180042 On 18-08-2026 09:12, Dmitry Baryshkov wrote: > On Mon, Aug 17, 2026 at 10:17:44AM +0530, Ekansh Gupta wrote: >> Introduce DMA-coherent buffer management for the QDA driver, wiring >> together the GEM subsystem, the IOMMU memory manager, and a DMA >> allocation backend. >> >> qda_gem.c / qda_gem.h >> Implements the GEM object lifecycle for QDA buffers. Each buffer is >> represented by a qda_gem_obj which embeds a drm_gem_object and >> carries the kernel virtual address, DMA address, and a pointer to >> the IOMMU device that performed the allocation. The .free callback >> delegates to the memory manager, and the .mmap callback uses >> dma_mmap_coherent() via the DMA backend. >> >> qda_memory_dma.c / qda_memory_dma.h >> DMA coherent allocation backend. qda_dma_alloc() calls >> dma_alloc_coherent() on the CB device and encodes the stream ID >> (SID) in the upper 32 bits of the returned DMA address, following >> the Qualcomm FastRPC convention for IOMMU address space tagging. >> qda_dma_free() strips the SID prefix before calling >> dma_free_coherent(). >> >> qda_memory_manager.c >> Adds process-to-device assignment: each DRM file (process) is >> assigned one IOMMU context bank device for the lifetime of the >> session. qda_memory_manager_assign_device() first checks whether >> the process already has a device (reusing it with a refcount >> increment), then falls back to claiming an unassigned device. >> qda_memory_manager_alloc() and qda_memory_manager_free() delegate >> to the DMA backend after resolving the correct CB device for the >> calling process. >> >> qda_drv.c / qda_drv.h >> qda_file_priv gains an assigned_iommu_dev pointer and a pid field. >> The .postclose callback decrements the IOMMU device refcount and >> clears the process assignment when the last reference is dropped. > > This provides a nice summary of the patch, which is pretty useless. I'll fix this for all patches.> Please teach your AI instead to describe the reasons and the design > decisions instead of just assessing what the code does. Why do you need > memory manager? Why can't you use existing GEM helpers? I'll add more details for this in commit message: The DSP requires each buffer's DMA address to carry the stream ID of the context bank that owns it (SID << 32 | IOVA). The memory manager tracks which CB is assigned to which process and ensures all allocations for a process go through that device. `drm_gem_dma_create()` and friends allocate from `dev`, the DRM device itself. QDA needs to allocate from one of N child CB devices (each with its own IOMMU domain), selected per-process. There's no existing GEM helper that takes a per-allocation device argument. //Ekansh > >> >> Assisted-by: Claude:claude-sonnet-5 >> Signed-off-by: Ekansh Gupta >> --- >> Changes in v2: >> - Adapt to the dynamically-sized device array introduced in patch 07 >> (kcalloc'd from DT node count, replaces fixed QDA_IOMMU_DEVICES_MAX) >> - Protect register/unregister with the process_assignment_lock mutex so >> the device-assignment and device-registration paths are serialised >> - No functional changes requested by reviewers on this patch >> --- >> drivers/accel/qda/Makefile | 2 + >> drivers/accel/qda/qda_drv.c | 4 + >> drivers/accel/qda/qda_drv.h | 4 + >> drivers/accel/qda/qda_gem.c | 134 ++++++++++++++++++ >> drivers/accel/qda/qda_gem.h | 52 +++++++ >> drivers/accel/qda/qda_memory_dma.c | 82 +++++++++++ >> drivers/accel/qda/qda_memory_dma.h | 17 +++ >> drivers/accel/qda/qda_memory_manager.c | 239 ++++++++++++++++++++++++++++++++- >> drivers/accel/qda/qda_memory_manager.h | 30 +++++ >> 9 files changed, 559 insertions(+), 5 deletions(-) >> >