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Sun, 23 Jul 2023 13:48:39 GMT Received: from [10.216.27.226] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Sun, 23 Jul 2023 06:48:33 -0700 Message-ID: <2d790f7e-b373-f0ee-d978-fb78bc4f1ed1@quicinc.com> Date: Sun, 23 Jul 2023 19:18:29 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.7.0 Subject: Re: [PATCH V5 2/3] pinctrl: qcom: Use qcom_scm_io_update_field() Content-Language: en-US To: Bjorn Andersson CC: Andy Gross , Konrad Dybcio , Linus Walleij , Elliot Berman , Mukesh Ojha , Kalle Valo , Loic Poulain , , , , , , , References: <20230720070408.1093698-1-quic_kathirav@quicinc.com> <20230720070408.1093698-3-quic_kathirav@quicinc.com> From: Kathiravan T In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: FaGS-JbVnQQj9Jm4O50NK_vdY9SkRngN X-Proofpoint-ORIG-GUID: FaGS-JbVnQQj9Jm4O50NK_vdY9SkRngN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-23_03,2023-07-20_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 phishscore=0 mlxscore=0 spamscore=0 adultscore=0 bulkscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 impostorscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2307230127 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/22/2023 8:39 AM, Bjorn Andersson wrote: > On Thu, Jul 20, 2023 at 12:34:07PM +0530, Kathiravan T wrote: >> From: Mukesh Ojha >> >> Use qcom_scm_io_update_field() function introduced in the commit >> 1f899e6997bb ("firmware: qcom_scm: provide a read-modify-write function"). >> >> Acked-by: Linus Walleij >> Signed-off-by: Mukesh Ojha >> Signed-off-by: Kathiravan T >> --- >> Changes in V5: >> - Dropped the ununecessary paranthesis >> - Updated the commit message to indicate the commit ID in which >> qcom_scm_io_update_field is introduced instead of simply >> mentioning the "last commit" >> >> drivers/pinctrl/qcom/pinctrl-msm.c | 12 +++++------- >> 1 file changed, 5 insertions(+), 7 deletions(-) >> >> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c >> index 2585ef2b2793..5ecde5bea38b 100644 >> --- a/drivers/pinctrl/qcom/pinctrl-msm.c >> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c >> @@ -1040,6 +1040,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) >> const struct msm_pingroup *g; >> unsigned long flags; >> bool was_enabled; >> + u32 mask; >> u32 val; >> >> if (msm_gpio_needs_dual_edge_parent_workaround(d, type)) { >> @@ -1074,23 +1075,20 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) >> * With intr_target_use_scm interrupts are routed to >> * application cpu using scm calls. >> */ >> + mask = GENMASK(2, 0) << g->intr_target_bit; >> if (pctrl->intr_target_use_scm) { >> u32 addr = pctrl->phys_base[0] + g->intr_target_reg; >> int ret; >> >> - qcom_scm_io_readl(addr, &val); >> - >> - val &= ~(7 << g->intr_target_bit); >> - val |= g->intr_target_kpss_val << g->intr_target_bit; >> - >> - ret = qcom_scm_io_writel(addr, val); >> + val = g->intr_target_kpss_val << g->intr_target_bit; >> + ret = qcom_scm_io_update_field(addr, mask, val); > Be aware when you resubmit that this code has changed. So please base > your changes on linux-next. I applied and tested this change on top of linux-next before sending it. I hope you are referring to the Ninad's patch[1] which is not available on linux-next yet. I shall wait for couple of days before sending the another version or let me resend based on Ninad's patch. Please let me know if you are referring something else. [1] https://lore.kernel.org/linux-arm-msm/20230718064246.12429-1-quic_ninanaik@quicinc.com/ > Regards, > Bjorn