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From: Like Xu <like.xu.linux@gmail.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] KVM: VMX: Adjust number of LBR records for PERF_CAPABILITIES at refresh
Date: Fri, 29 Jul 2022 18:10:11 +0800	[thread overview]
Message-ID: <2d932ad7-899b-ed26-d77c-f149fb2afc36@gmail.com> (raw)
In-Reply-To: <20220727233424.2968356-4-seanjc@google.com>

On 28/7/2022 7:34 am, Sean Christopherson wrote:
> guest_cpuid_has() is expensive due to the linear search of guest CPUID
> entries, intel_pmu_lbr_is_enabled() is checked on every VM-Enter,_and_
> simply enumerating the same "Model" as the host causes KVM to set the
> number of LBR records to a non-zero value.

Before reconsidering vcpu->arch.perf_capabilities to reach a conclusion,
how about this minor inline change help reduce my sins ?

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 0ecbbae42976..06a21d66be13 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -7039,7 +7039,8 @@ static fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu)
  	pt_guest_enter(vmx);

  	atomic_switch_perf_msrs(vmx);
-	if (intel_pmu_lbr_is_enabled(vcpu))
+	if (vmx->lbr_desc.records.nr &&
+	    (vcpu->arch.perf_capabilities & PMU_CAP_LBR_FMT))
  		vmx_passthrough_lbr_msrs(vcpu);

  	if (enable_preemption_timer)

  reply	other threads:[~2022-07-29 10:10 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-27 23:34 [PATCH 0/3] KVM: x86: Intel PERF_CAPABILITIES fix and cleanups Sean Christopherson
2022-07-27 23:34 ` [PATCH 1/3] KVM: x86: Refresh PMU after writes to MSR_IA32_PERF_CAPABILITIES Sean Christopherson
2022-07-28 12:02   ` Like Xu
2022-07-28 15:27     ` Sean Christopherson
2022-07-29  9:33       ` Like Xu
2022-07-29 13:51         ` Sean Christopherson
2022-08-03 12:29   ` Like Xu
2022-08-03 14:37     ` Sean Christopherson
2022-08-03 18:47       ` Sean Christopherson
2022-07-27 23:34 ` [PATCH 2/3] KVM: VMX: Use proper type-safe functions for vCPU => LBRs helpers Sean Christopherson
2022-07-29  8:39   ` Like Xu
2022-07-29 16:08     ` Sean Christopherson
2022-07-27 23:34 ` [PATCH 3/3] KVM: VMX: Adjust number of LBR records for PERF_CAPABILITIES at refresh Sean Christopherson
2022-07-29 10:10   ` Like Xu [this message]
2022-07-29 17:28     ` Sean Christopherson
2022-08-02 12:04   ` Like Xu
2022-08-02 14:57     ` Sean Christopherson
2022-08-10 13:24 ` [PATCH 0/3] KVM: x86: Intel PERF_CAPABILITIES fix and cleanups Paolo Bonzini

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