From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15A47C001E0 for ; Wed, 16 Aug 2023 11:24:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244486AbjHPLYI (ORCPT ); Wed, 16 Aug 2023 07:24:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244405AbjHPLXo (ORCPT ); Wed, 16 Aug 2023 07:23:44 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1F5822123 for ; Wed, 16 Aug 2023 04:23:43 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 123341063; Wed, 16 Aug 2023 04:24:24 -0700 (PDT) Received: from [10.57.90.114] (unknown [10.57.90.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 62AD13F762; Wed, 16 Aug 2023 04:23:41 -0700 (PDT) Message-ID: <2e076cb5-1e31-10b2-9f33-79a825ac9c11@arm.com> Date: Wed, 16 Aug 2023 12:23:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:102.0) Gecko/20100101 Thunderbird/102.14.0 Subject: Re: [PATCH] perf: ARM_SMMU_V3_PMU should depend on ARM_SMMU_V3 Content-Language: en-GB To: Geert Uytterhoeven , Will Deacon , Mark Rutland Cc: Jean-Philippe Brucker , Vincent Whitchurch , Joerg Roedel , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org References: <0f8ac07472f4161c71247742acb2303f9cf91396.1692113438.git.geert+renesas@glider.be> From: Robin Murphy In-Reply-To: <0f8ac07472f4161c71247742acb2303f9cf91396.1692113438.git.geert+renesas@glider.be> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2023-08-15 16:36, Geert Uytterhoeven wrote: > There is no point in monitoring transactions passing through the SMMU > when ARM Ltd. System MMU Version 3 (SMMUv3) Support is disabled. > Hence replace the dependency on ARM64 by a dependency on ARM_SMMU_V3 > (which implies the former). > > Signed-off-by: Geert Uytterhoeven > --- > This caught my eye after commit 7c3f204e544dfa37 ("perf/smmuv3: Remove > build dependency on ACPI") in arm64/for-next/core. > > Perhaps my understanding is wrong? Is there anything to monitor when > ARM_SMMU_V3=n? Yes, at least TBU event 1 still counts bypass transactions even when the SMMU is disabled, so PMCGs can be useful as basic traffic monitors in their own right. Plus the original design intent was that PMCGs may also be implemented by other things that interact with the SMMU, like ATS-capable PCIe root complexes, or devices with their own internal TLBs, thus they could potentially count any manner of implementation-defined events that aren't necessarily related to SMMU translation. Thanks, Robin. > drivers/perf/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig > index 273d67ecf6d2530f..c33324692fbf0141 100644 > --- a/drivers/perf/Kconfig > +++ b/drivers/perf/Kconfig > @@ -92,7 +92,7 @@ config ARM_PMU_ACPI > > config ARM_SMMU_V3_PMU > tristate "ARM SMMUv3 Performance Monitors Extension" > - depends on ARM64 || (COMPILE_TEST && 64BIT) > + depends on ARM_SMMU_V3 || (COMPILE_TEST && 64BIT) > depends on GENERIC_MSI_IRQ > help > Provides support for the ARM SMMUv3 Performance Monitor Counter