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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTI1MDE3MSBTYWx0ZWRfX9WxaeCJ0WI+i szmrZP+SkW2AUcMQGDf363y4IkmIxjZxk0I/aeC4MDCKA2GdwjUJUHdbRavcCaNa0ZjqXbsRqAz EWbuMHCYI79rKT1MMVU70AP/quC44VH+81xXZCoIR0RjxfyMXRDzio/9wNG42NL49RfdkZSwFL6 M9QJVgsIh6fbBgHxiZbJs9vb0Z4y1Fh4gU4oE4i1lo3hW8sQ7XGxFp9Es2WqM4SapW71+j8m9u7 6QSMr71VUNGmMSoG8sJBgjQdTUFkQmk6KZvY27GHLjiT3G1wN6nZM4ihzr7DhbLsil1BozeQa2n uF1P3M7mvljw5zD7SSSQ0ZEdi9Ma12yrfnIWHy5TNu4cBkfGnQ7Ao0yYN/oyWk/H2YgkfuZM85g wrUa+oVms00J3GfGPvLn7oneJjiRfg== X-Proofpoint-GUID: ulTrBmpFGuStP8OFQDcIbeV9cvSHBg6h X-Proofpoint-ORIG-GUID: ulTrBmpFGuStP8OFQDcIbeV9cvSHBg6h X-Authority-Analysis: v=2.4 cv=JsX8bc4C c=1 sm=1 tr=0 ts=68d65ae8 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=TyDm9B-wxu7uxzFpS6AA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-26_02,2025-09-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 priorityscore=1501 spamscore=0 malwarescore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 phishscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2509250171 On 9/12/2025 4:38 PM, Konrad Dybcio wrote: > On 8/29/25 12:15 PM, Taniya Das wrote: >> Add support for the video clock controller for video clients to be able >> to request for videocc clocks on SM8750 platform. >> >> Signed-off-by: Taniya Das >> --- > > [...] > >> +static int video_cc_sm8750_probe(struct platform_device *pdev) >> +{ >> + struct regmap *regmap; >> + int ret; >> + >> + ret = devm_pm_runtime_enable(&pdev->dev); >> + if (ret) >> + return ret; >> + >> + ret = pm_runtime_resume_and_get(&pdev->dev); >> + if (ret) >> + return ret; >> + >> + regmap = qcom_cc_map(pdev, &video_cc_sm8750_desc); >> + if (IS_ERR(regmap)) { >> + pm_runtime_put(&pdev->dev); >> + return PTR_ERR(regmap); >> + } >> + >> + clk_taycan_elu_pll_configure(&video_cc_pll0, regmap, &video_cc_pll0_config); >> + >> + /* Update DLY_ACCU_RED_SHIFTER_DONE to 0xF for mvs0, mvs0c */ >> + regmap_update_bits(regmap, 0x8074, 0x1e00000, 0x1e00000); > > regmap_update_bits(..., GENMASK(x, y) /* full field width */, 0xf) Sure, Konrad, will update the change. > > would be easier for the next person to check against docs in case this > needs to ever change or be validated >> + regmap_update_bits(regmap, 0x8040, 0x1e00000, 0x1e00000); >> + >> + regmap_update_bits(regmap, 0x9f24, BIT(0), BIT(0)); > > The register description mentions a ticket which I believe says this > is not necessary in production hardware > It is required on production hardware as well. >> + >> + /* >> + * Keep clocks always enabled: >> + * video_cc_ahb_clk >> + * video_cc_sleep_clk >> + * video_cc_xo_clk >> + */ >> + regmap_update_bits(regmap, 0x80a4, BIT(0), BIT(0)); >> + regmap_update_bits(regmap, 0x80f8, BIT(0), BIT(0)); >> + regmap_update_bits(regmap, 0x80d4, BIT(0), BIT(0)); > > Please use the new _desc infra > > Konrad Yes, will migrate to use the _desc infra. -- Thanks, Taniya Das