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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.googlemail.com with ESMTPSA id d2sm14784098ejw.70.2022.02.01.09.19.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 01 Feb 2022 09:19:45 -0800 (PST) Message-ID: <2e8b9c10-be9d-e721-30bd-06e89a92d0f1@redhat.com> Date: Tue, 1 Feb 2022 18:19:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH 1/1 fyi] tools headers cpufeatures: Sync with the kernel sources Content-Language: en-US To: Arnaldo Carvalho de Melo , Jing Liu Cc: Linux Kernel Mailing List References: From: Paolo Bonzini In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/1/22 16:21, Arnaldo Carvalho de Melo wrote: > To pick the changes from: > > 690a757d610e50c2 ("kvm: x86: Add CPUID support for Intel AMX") > > This only causes these perf files to be rebuilt: > > CC /tmp/build/perf/bench/mem-memcpy-x86-64-asm.o > CC /tmp/build/perf/bench/mem-memset-x86-64-asm.o > > And addresses this perf build warning: > > Warning: Kernel ABI header at 'tools/arch/x86/include/asm/cpufeatures.h' differs from latest version at 'arch/x86/include/asm/cpufeatures.h' > diff -u tools/arch/x86/include/asm/cpufeatures.h arch/x86/include/asm/cpufeatures.h > > Cc: Jing Liu > Cc: Paolo Bonzini > Signed-off-by: Arnaldo Carvalho de Melo > --- > tools/arch/x86/include/asm/cpufeatures.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h > index 18de5f76f19856b1..6db4e2932b3d8657 100644 > --- a/tools/arch/x86/include/asm/cpufeatures.h > +++ b/tools/arch/x86/include/asm/cpufeatures.h > @@ -299,7 +299,9 @@ > /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ > #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ > #define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */ > +#define X86_FEATURE_AMX_BF16 (18*32+22) /* AMX bf16 Support */ > #define X86_FEATURE_AMX_TILE (18*32+24) /* AMX tile Support */ > +#define X86_FEATURE_AMX_INT8 (18*32+25) /* AMX int8 Support */ > > /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ > #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ Thanks! Paolo