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Mon, 26 Oct 2026 05:49:28 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c46bd650890sm329086566b.51.2026.10.26.05.49.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 26 Oct 2026 05:49:27 -0700 (PDT) Message-ID: <2e928aaf-0659-4bc2-b6f7-e2a0a5e8d3f1@oss.qualcomm.com> Date: Mon, 26 Oct 2026 13:49:25 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: qcs6490-rb3gen2: Add SPI3 QUP core bandwidth OPP To: Viken Dadhaniya , Bjorn Andersson , Konrad Dybcio , Abel Vesa , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: mukesh.savaliya@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261025-qcs6490-spi3-opp-table-v1-1-d0e0be6ed1b7@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20261025-qcs6490-spi3-opp-table-v1-1-d0e0be6ed1b7@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: bQ9pPfo3MFuO-WsAeSBBWpb-Xe7Nbk2X X-Proofpoint-GUID: bQ9pPfo3MFuO-WsAeSBBWpb-Xe7Nbk2X X-Authority-Analysis: v=2.4 cv=a4elZkSF c=1 sm=1 tr=0 ts=6adf4c5a cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=62u0kLJnlP3cDVRif6QA:9 a=QEXdDO2ut3YA:10 a=zZCYzV9kfG8A:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI2MDA1MCBTYWx0ZWRfX4L7Gg4qOXe6v kB/0d3PY3JCRHOqymPSlXGuLNaxgTQGjRYVQFy1mH9sDym9edygfPI095/b71Ha0fi/QMKFWky6 i3azvJDV/FMskEay6AIGTOrIKmmDPvA= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI2MDA1MCBTYWx0ZWRfX5i9fjcsvb3St 20nWCj09NiZ2NF131Zx3rwigBkthXVpLsWVBWrGf3Zlxf/1eaTGEoWaCQ1Gq7jwJuuFAM3KP8CT bqYnYKzrKPW5npJTN/B+F7lhvUKGyvJgeRzMCpzYxehW2Rt4slkSmDFzwdn9/2YyLH8tru7CxXl LA+DejvpqvGTwXbnzJiFuIK4+2nUGQY/Ttpkdcf+5AJrGhltXTDd3kaSEyxPVnfE/iSAVoL6d8j 9DOxAIn8dotXknLnIY5mkoXOf0Ze0LPppmggDySsHlo4D+CtBcipeeCyUG/xY1vHZFXkhZPL9pM zW31g6ScVVtxKD1th4MNYuLkpIzsVipie+IscsnShtiIT1lO/BV+d4KZ2KZUhYoL46PsiTCyyLL FU6Gxe1weIX5qKjL9iVQIFg1vSrw1DbJP3xQ7Q2BLBiFw1GCSRl7bz86mrXLqJc1+zaBTCejOdE /WW0l2Iqjdtv1S8HSWA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-26_02,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610260050 On 10/25/26 2:43 PM, Viken Dadhaniya wrote: > Short SPI transfers are sensitive to the bandwidth available on the QUP > core interconnect path. An insufficient vote delays Serial Engine > register and FIFO accesses, increasing command-dispatch latency. > > Add a dedicated SPI3 OPP table with the valid 75 MHz and 100 MHz > source-clock and RPMh power-domain OPPs. Add a 100000 kBps average and > peak vote for the QUP core interconnect path. This improves MCP2518FD CAN > payload throughput by approximately 38%. > > Limit the vote to SPI3 on RB3Gen2, where it serves the MCP2518FD CAN > controller and its frequent short SPI transfers. Other QUP/SPI instances > do not require this vote, so avoid raising their interconnect bandwidth > unnecessarily. You can solve the general problem OR you can do what this and create more work down the line. What if I connect a MCP2518FD on SPI4? SPI5? SPI6? Konrad