From: Adrian Hunter <adrian.hunter@intel.com>
To: Chunyan Zhang <zhang.chunyan@linaro.org>,
Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
Orson Zhai <orsonzhai@gmail.com>,
Baolin Wang <baolin.wang@linaro.org>,
Billows Wu <billows.wu@spreadtrum.com>,
zhang.lyra@gmail.com
Subject: Re: [PATCH V2 2/7] mmc: sdhci: made changes for System Address register of SDMA
Date: Thu, 21 Jun 2018 14:22:51 +0300 [thread overview]
Message-ID: <2eb994d3-7f23-6ff8-4740-7a444a581e9d@intel.com> (raw)
In-Reply-To: <1529028255-6022-3-git-send-email-zhang.chunyan@linaro.org>
On 15/06/18 05:04, Chunyan Zhang wrote:
> According to the SD host controller specification version 4.10, when
> Host Version 4 is enabled, SDMA uses ADMA System Address register
> (05Fh-058h) instead of using SDMA System Address register to
> support both 32-bit and 64-bit addressing.
>
> Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
> ---
> drivers/mmc/host/sdhci.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index cf5695f..f57201f 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -805,6 +805,7 @@ static void sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd)
> static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd)
> {
> u8 ctrl;
> + u32 reg;
reg could just be an int.
> struct mmc_data *data = cmd->data;
>
> if (sdhci_data_line_cmd(cmd))
> @@ -894,8 +895,10 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd)
> SDHCI_ADMA_ADDRESS_HI);
> } else {
> WARN_ON(sg_cnt != 1);
> + reg = host->v4_mode ? SDHCI_ADMA_ADDRESS :
> + SDHCI_DMA_ADDRESS;
> sdhci_writel(host, sdhci_sdma_address(host),
> - SDHCI_DMA_ADDRESS);
> + reg);
Shouldn't we support 64-bit SDMA in version 4 mode?
> }
> }
>
> @@ -2721,6 +2724,7 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
> */
> if (intmask & SDHCI_INT_DMA_END) {
> u32 dmastart, dmanow;
> + u32 reg;
>
> dmastart = sdhci_sdma_address(host);
> dmanow = dmastart + host->data->bytes_xfered;
> @@ -2733,7 +2737,9 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
> host->data->bytes_xfered = dmanow - dmastart;
> DBG("DMA base 0x%08x, transferred 0x%06x bytes, next 0x%08x\n",
> dmastart, host->data->bytes_xfered, dmanow);
> - sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS);
> + reg = host->v4_mode ? SDHCI_ADMA_ADDRESS :
> + SDHCI_DMA_ADDRESS;
> + sdhci_writel(host, dmanow, reg);
Shouldn't we support 64-bit SDMA in version 4 mode?
> }
>
> if (intmask & SDHCI_INT_DATA_END) {
>
next prev parent reply other threads:[~2018-06-21 11:24 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-15 2:04 [PATCH V2 0/7] mmc: add support for sdhci 4.0 Chunyan Zhang
2018-06-15 2:04 ` [PATCH V2 1/7] mmc: sdhci: add sd host v4 mode Chunyan Zhang
2018-06-21 10:49 ` Adrian Hunter
2018-06-21 11:14 ` Chunyan Zhang
2018-06-21 13:15 ` Adrian Hunter
2018-07-04 3:02 ` Chunyan Zhang
2018-06-15 2:04 ` [PATCH V2 2/7] mmc: sdhci: made changes for System Address register of SDMA Chunyan Zhang
2018-06-21 11:22 ` Adrian Hunter [this message]
2018-07-04 3:02 ` Chunyan Zhang
2018-06-15 2:04 ` [PATCH V2 3/7] mmc: sdhci: add ADMA2 64-bit addressing support for V4 mode Chunyan Zhang
2018-06-21 13:20 ` Adrian Hunter
2018-07-04 3:03 ` Chunyan Zhang
2018-06-15 2:04 ` [PATCH V2 4/7] mmc: sdhci: add 32-bit block count support for v4 mode Chunyan Zhang
2018-06-15 2:04 ` [PATCH V2 5/7] mmc: sdhci: add CMD23 " Chunyan Zhang
2018-06-22 19:40 ` Adrian Hunter
2018-07-04 3:03 ` Chunyan Zhang
2018-06-15 2:04 ` [PATCH V2 6/7] mmc: sdhci-sprd: added Spreadtrum's initial host controller Chunyan Zhang
2018-06-15 9:36 ` [PATCH V3 " Chunyan Zhang
2018-06-18 8:56 ` Ulf Hansson
2018-06-15 2:04 ` [PATCH V2 7/7] dt-bindings: sdhci-sprd: Add bindings for the sdhci-sprd controller Chunyan Zhang
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