Re: [PATCH net-next 1/2] dt-bindings: net: dp83822: Add TI dp83822 phy

[Dan Murphy <dmurphy@ti.com>]

Andrew

On 5/14/20 1:39 PM, Andrew Lunn wrote:
> On Thu, May 14, 2020 at 12:30:54PM -0500, Dan Murphy wrote:
>> Add a dt binding for the TI dp83822 ethernet phy device.
>>
>> CC: Rob Herring <robh+dt@kernel.org>
>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>> ---
>>   .../devicetree/bindings/net/ti,dp83822.yaml   | 49 +++++++++++++++++++
>>   1 file changed, 49 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/net/ti,dp83822.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/net/ti,dp83822.yaml b/Documentation/devicetree/bindings/net/ti,dp83822.yaml
>> new file mode 100644
>> index 000000000000..60afd43ad3b6
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/net/ti,dp83822.yaml
>> @@ -0,0 +1,49 @@
>> +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
>> +# Copyright (C) 2020 Texas Instruments Incorporated
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/net/ti,dp83822.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: TI DP83822 ethernet PHY
>> +
>> +allOf:
>> +  - $ref: "ethernet-controller.yaml#"
>> +
>> +maintainers:
>> +  - Dan Murphy <dmurphy@ti.com>
>> +
>> +description: |
>> +  The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It
>> +  provides all of the physical layer functions needed to transmit and receive
>> +  data over standard, twisted-pair cables or to connect to an external,
>> +  fiber-optic transceiver. Additionally, the DP83822 provides flexibility to
>> +  connect to a MAC through a standard MII, RMII, or RGMII interface
> Hi Dan
>
> You say 10/100 Mbps Ethernet PHY, but then list RGMII?
Copied from the data sheet.
>
>> +
>> +  Specifications about the charger can be found at:
>> +    http://www.ti.com/lit/ds/symlink/dp83822i.pdf
>> +
>> +properties:
>> +  reg:
>> +    maxItems: 1
>> +
>> +  ti,signal-polarity-low:
>> +    type: boolean
>> +    description: |
>> +       DP83822 PHY in Fiber mode only.
>> +       Sets the DP83822 to detect a link drop condition when the signal goes
>> +       high.  If not set then link drop will occur when the signal goes low.
> Are we talking about the LOS line from the SFP cage? In the SFF/SFP
> binding we have:
>
> - los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal
>    Indication input gpio signal, active (signal lost) high
>
> It would be nice to have a consistent naming.

> Is it required the LOS signal is connected to the PHY? Russell King
> has some patches which allows the Marvell PHY to be used as a media
> converter. In that setting, i think the SFP signals are connected to
> GPIOs not the PHY. The SFP core can then control the transmit disable,
> module insertion detection etc. So i'm wondering if you need a
> property to indicate the LOS is not connected to the PHY?

The LED_1 pin can be strapped to be an input to the chip for signal loss 
detection.  This is an optional feature of the PHY.

This property defines the polarity for the 822 LED_1/GPIO input pin.

The LOS is not required to be connected to the PHY.  If the preferred 
method is to use the SFP framework and Processor GPIOs then I can remove 
this from the patch set.

And if a user would like to use the feature then they can add it.

Dan


>
> 	 Andrew