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Fri, 13 Mar 2026 01:07:47 -0700 (PDT) X-Received: by 2002:a17:90b:2e45:b0:359:f0e1:f8b7 with SMTP id 98e67ed59e1d1-35a21ed3887mr2150280a91.10.1773389267194; Fri, 13 Mar 2026 01:07:47 -0700 (PDT) Received: from [10.0.0.3] ([106.222.229.52]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35a02e660dcsm7801204a91.5.2026.03.13.01.07.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Mar 2026 01:07:46 -0700 (PDT) Message-ID: <2f233008-cdf6-5999-d703-73f58cc0f5ed@oss.qualcomm.com> Date: Fri, 13 Mar 2026 13:37:42 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v4 8/8] media: qcom: iris: split platform data from firmware data Content-Language: en-US To: Dmitry Baryshkov , Vikash Garodia , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260313-iris-platform-data-v4-0-14927df4906d@oss.qualcomm.com> <20260313-iris-platform-data-v4-8-14927df4906d@oss.qualcomm.com> From: Dikshita Agarwal In-Reply-To: <20260313-iris-platform-data-v4-8-14927df4906d@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: rMeluXIaWfjhPlHscWPeHFB5ucHC-ZBS X-Authority-Analysis: v=2.4 cv=FLwWBuos c=1 sm=1 tr=0 ts=69b3c5d4 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=ndT/fs+coltRyMHftQWjTw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=ijYXavbH0mQpeC2t6NUA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzEzMDA2MyBTYWx0ZWRfX0SvFy+gJEAPO Orsdykcqn1qiEvmOxyJkgAtGS8w7Iw3Ifg+Nb2ldMrARbAMgH/EvO2s7tnGr4ZGHcnDh3TjtnhV HrLO0mhgm9PJolwnaFgmY6c4kEFnYVHFrYFpyPajyHxyhpJ0NytiU+HljSktfLFqw0i1BtFf3ob 4C5TEEVqNQr53rBK+ejVP2lp7/OTtljA/hZ5WPeORa/K7bKt4eX4eqV6VJONUdX+K+dhkod7+M/ C88wuU3fvVSSIzY3UqKXArsZAvadeVJ8E1AZ6noVnJTqX3jTY5TKEY4kjAjU1yuGWiup/Dws4s9 5PxN30VL3pshj+dV5dg0VnVvYIamoDG1fDqh/l3x0cwAV06PXxPguoObJs+qO85bbjSyxm8YcI2 y54VEMiTynWv3PVZpCTfuIRyQlljmqMbvOPXw8/5zKFETe1536jlhgf9HaL/sUJAJZkiMdFcL1Y 7lYATKkrFPjaepN7BRA== X-Proofpoint-GUID: rMeluXIaWfjhPlHscWPeHFB5ucHC-ZBS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-13_01,2026-03-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 bulkscore=0 malwarescore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603130063 On 3/13/2026 9:00 AM, Dmitry Baryshkov wrote: > Finalize the logical separation of the software and hardware interface > descriptions by moving hardware properties to the files specific to the > particular VPU version. > > Signed-off-by: Dmitry Baryshkov > --- > drivers/media/platform/qcom/iris/Makefile | 6 +- > .../iris/{iris_platform_gen1.c => iris_hfi_gen1.c} | 133 ------------- > .../iris/{iris_platform_gen2.c => iris_hfi_gen2.c} | 218 --------------------- > .../platform/qcom/iris/iris_platform_common.h | 4 + > .../platform/qcom/iris/iris_platform_sm8250.h | 29 +++ > .../platform/qcom/iris/iris_platform_sm8550.h | 31 +++ > .../media/platform/qcom/iris/iris_platform_vpu2.c | 124 ++++++++++++ > .../media/platform/qcom/iris/iris_platform_vpu3.c | 210 ++++++++++++++++++++ > 8 files changed, 402 insertions(+), 353 deletions(-) > > diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu2.c b/drivers/media/platform/qcom/iris/iris_platform_vpu2.c > new file mode 100644 > index 000000000000..74c8f38e849b > --- /dev/null > +++ b/drivers/media/platform/qcom/iris/iris_platform_vpu2.c > @@ -0,0 +1,124 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (c) Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#include "iris_core.h" > +#include "iris_ctrls.h" > +#include "iris_platform_common.h" > +#include "iris_resources.h" > +#include "iris_hfi_gen1.h" > +#include "iris_hfi_gen1_defines.h" > +#include "iris_vpu_buffer.h" > +#include "iris_vpu_common.h" > +#include "iris_instance.h" > + > +#include "iris_platform_sc7280.h" > +#include "iris_platform_sm8250.h" > + > +static struct iris_fmt platform_fmts_sm8250_dec[] = { How about naming this as platform_fmts_vpu2_dec ? > + [IRIS_FMT_H264] = { > + .pixfmt = V4L2_PIX_FMT_H264, > + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, > + }, > + [IRIS_FMT_HEVC] = { > + .pixfmt = V4L2_PIX_FMT_HEVC, > + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, > + }, > + [IRIS_FMT_VP9] = { > + .pixfmt = V4L2_PIX_FMT_VP9, > + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, > + }, > +}; > + > +static struct platform_inst_caps platform_inst_cap_sm8250 = { platform_inst_cap_vpu2 ? > + .min_frame_width = 128, > + .max_frame_width = 8192, > + .min_frame_height = 128, > + .max_frame_height = 8192, > + .max_mbpf = 138240, > + .mb_cycles_vsp = 25, > + .mb_cycles_vpp = 200, > + .max_frame_rate = MAXIMUM_FPS, > + .max_operating_rate = MAXIMUM_FPS, > +}; > + > +static const struct icc_info sm8250_icc_table[] = { icc_table_vpu2 ? > + { "cpu-cfg", 1000, 1000 }, > + { "video-mem", 1000, 15000000 }, > +}; > + > +static const char * const sm8250_clk_reset_table[] = { "bus", "core" }; clk_reset_table_vpu2 ? and so on. > + > +static const char * const sm8250_pmdomain_table[] = { "venus", "vcodec0" }; > + > +static const struct tz_cp_config tz_cp_config_sm8250[] = { > + { > + .cp_start = 0, > + .cp_size = 0x25800000, > + .cp_nonpixel_start = 0x01000000, > + .cp_nonpixel_size = 0x24800000, > + }, > +}; > + > +const struct iris_platform_data sc7280_data = { > + .firmware_data = &iris_hfi_gen1_data, > + .vpu_ops = &iris_vpu2_ops, > + .icc_tbl = sm8250_icc_table, > + .icc_tbl_size = ARRAY_SIZE(sm8250_icc_table), > + .bw_tbl_dec = sc7280_bw_table_dec, > + .bw_tbl_dec_size = ARRAY_SIZE(sc7280_bw_table_dec), > + .pmdomain_tbl = sm8250_pmdomain_table, > + .pmdomain_tbl_size = ARRAY_SIZE(sm8250_pmdomain_table), > + .opp_pd_tbl = sc7280_opp_pd_table, > + .opp_pd_tbl_size = ARRAY_SIZE(sc7280_opp_pd_table), > + .clk_tbl = sc7280_clk_table, > + .clk_tbl_size = ARRAY_SIZE(sc7280_clk_table), > + .opp_clk_tbl = sc7280_opp_clk_table, > + /* Upper bound of DMA address range */ > + .dma_mask = 0xe0000000 - 1, > + .fwname = "qcom/vpu/vpu20_p1.mbn", > + .inst_iris_fmts = platform_fmts_sm8250_dec, > + .inst_iris_fmts_size = ARRAY_SIZE(platform_fmts_sm8250_dec), > + .inst_caps = &platform_inst_cap_sm8250, > + .tz_cp_config_data = tz_cp_config_sm8250, > + .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8250), > + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, > + .num_vpp_pipe = 1, > + .no_aon = true, > + .max_session_count = 16, > + .max_core_mbpf = 4096 * 2176 / 256 * 2 + 1920 * 1088 / 256, > + /* max spec for SC7280 is 4096x2176@60fps */ > + .max_core_mbps = 4096 * 2176 / 256 * 60, > +}; > + > +const struct iris_platform_data sm8250_data = { > + .firmware_data = &iris_hfi_gen1_data, > + .vpu_ops = &iris_vpu2_ops, > + .icc_tbl = sm8250_icc_table, > + .icc_tbl_size = ARRAY_SIZE(sm8250_icc_table), > + .clk_rst_tbl = sm8250_clk_reset_table, > + .clk_rst_tbl_size = ARRAY_SIZE(sm8250_clk_reset_table), > + .bw_tbl_dec = sm8250_bw_table_dec, > + .bw_tbl_dec_size = ARRAY_SIZE(sm8250_bw_table_dec), > + .pmdomain_tbl = sm8250_pmdomain_table, > + .pmdomain_tbl_size = ARRAY_SIZE(sm8250_pmdomain_table), > + .opp_pd_tbl = sm8250_opp_pd_table, > + .opp_pd_tbl_size = ARRAY_SIZE(sm8250_opp_pd_table), > + .clk_tbl = sm8250_clk_table, > + .clk_tbl_size = ARRAY_SIZE(sm8250_clk_table), > + .opp_clk_tbl = sm8250_opp_clk_table, > + /* Upper bound of DMA address range */ > + .dma_mask = 0xe0000000 - 1, > + .fwname = "qcom/vpu-1.0/venus.mbn", > + .inst_iris_fmts = platform_fmts_sm8250_dec, > + .inst_iris_fmts_size = ARRAY_SIZE(platform_fmts_sm8250_dec), > + .inst_caps = &platform_inst_cap_sm8250, > + .tz_cp_config_data = tz_cp_config_sm8250, > + .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8250), > + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, > + .num_vpp_pipe = 4, > + .max_session_count = 16, > + .max_core_mbpf = NUM_MBS_8K, > + .max_core_mbps = ((7680 * 4320) / 256) * 60, > +}; > diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu3.c b/drivers/media/platform/qcom/iris/iris_platform_vpu3.c > new file mode 100644 > index 000000000000..2c0e5be72920 > --- /dev/null > +++ b/drivers/media/platform/qcom/iris/iris_platform_vpu3.c iris_platform_vpu3x.c ? > @@ -0,0 +1,210 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (c) Qualcomm Innovation Center, Inc. All rights reserved. > + * Copyright (c) 2025 Linaro Ltd > + */ > + > +#include "iris_core.h" > +#include "iris_ctrls.h" > +#include "iris_hfi_gen2.h" > +#include "iris_hfi_gen2_defines.h" > +#include "iris_platform_common.h" > +#include "iris_vpu_buffer.h" > +#include "iris_vpu_common.h" > + > +#include "iris_platform_qcs8300.h" > +#include "iris_platform_sm8550.h" > +#include "iris_platform_sm8650.h" > +#include "iris_platform_sm8750.h" > + > +#define VIDEO_ARCH_LX 1 > + > +static struct iris_fmt platform_fmts_sm8550_dec[] = { platform_fmts_vpu3x_dec ? > + [IRIS_FMT_H264] = { > + .pixfmt = V4L2_PIX_FMT_H264, > + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, > + }, > + [IRIS_FMT_HEVC] = { > + .pixfmt = V4L2_PIX_FMT_HEVC, > + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, > + }, > + [IRIS_FMT_VP9] = { > + .pixfmt = V4L2_PIX_FMT_VP9, > + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, > + }, > + [IRIS_FMT_AV1] = { > + .pixfmt = V4L2_PIX_FMT_AV1, > + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, > + }, > +}; > + > +static const struct icc_info sm8550_icc_table[] = { icc_table_vpu3x ? and so on. Thanks, Dikshita > + { "cpu-cfg", 1000, 1000 }, > + { "video-mem", 1000, 15000000 }, > +}; > + > +static const struct bw_info sm8550_bw_table_dec[] = { > + { ((4096 * 2160) / 256) * 60, 1608000 }, > + { ((4096 * 2160) / 256) * 30, 826000 }, > + { ((1920 * 1080) / 256) * 60, 567000 }, > + { ((1920 * 1080) / 256) * 30, 294000 }, > +}; > + > +static const char * const sm8550_pmdomain_table[] = { "venus", "vcodec0" }; > + > +static const char * const sm8550_opp_pd_table[] = { "mxc", "mmcx" }; > + > +static const char * const sm8550_opp_clk_table[] = { > + "vcodec0_core", > + NULL, > +}; > + > +static const struct tz_cp_config tz_cp_config_sm8550[] = { > + { > + .cp_start = 0, > + .cp_size = 0x25800000, > + .cp_nonpixel_start = 0x01000000, > + .cp_nonpixel_size = 0x24800000, > + }, > +};