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charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzE4MDEzOSBTYWx0ZWRfX9DAkPeDJxlDL f6qQfvK/jWPF0W0YBp3fpE1wQ00CzU5bW202NwTxGvZ5OZM1JO4j6M2zSxXMBL+t9ow2WmVf2m+ 25mm//v8ukpkRKbnqsljxWEgO18yaHgLHmXyKga+5ckchk2NRGtUHtt7u6E30akMYBm63WqswGu yOIYTOLPwgKhqlEXK1/w/YNjout28K6ibqu+TmvGSQxwBboyrWY80Bjoelm4fy794ulEXPpYlmH E0ZFdi/a3VGa1D1IDYk+T8+jLKEiMSZkVe/HpQxkUKSy1dWg+YzWUA567pQ/N5/IpgSMAyWUu+I TcaU0oLM3QtURd2DNHrZgXf0b06Kf02Ecxn8XPAb9MQw3U44WuENASsUOG2fHnYCT0CWoqQBLXs VbD3eJxu53eMtOyquMNC5Lw3OFxYI7o2uVC7qyhwCdQOCwPylb8uvytB212XZ2UhXgGS+oUy X-Proofpoint-GUID: KPhG5vtel0j5dlSxQcAJnUOAcXRbglRF X-Authority-Analysis: v=2.4 cv=SZT3duRu c=1 sm=1 tr=0 ts=687a865b cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=tMiizUMu9hGndvLFPAJAbA==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=ZEZnheZsc53CzuolOOIA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-ORIG-GUID: KPhG5vtel0j5dlSxQcAJnUOAcXRbglRF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-18_04,2025-07-17_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=999 mlxscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 adultscore=0 impostorscore=0 malwarescore=0 phishscore=0 spamscore=0 suspectscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507180139 On 7/17/2025 3:38 PM, Krzysztof Kozlowski wrote: > On 17/07/2025 11:57, Abel Vesa wrote: >> On 25-07-16 20:50:17, Pankaj Patil wrote: >>> From: Taniya Das >>> >>> Add support for Global clock controller for Glymur platform. >>> >>> Signed-off-by: Taniya Das >>> Signed-off-by: Pankaj Patil >>> --- >>> drivers/clk/qcom/Kconfig | 10 + >>> drivers/clk/qcom/Makefile | 1 + >>> drivers/clk/qcom/gcc-glymur.c | 8623 +++++++++++++++++++++++++++++++++ >>> 3 files changed, 8634 insertions(+) >>> create mode 100644 drivers/clk/qcom/gcc-glymur.c >>> >>> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig >>> index 051301007aa6..1d9e8c6aeaed 100644 >>> --- a/drivers/clk/qcom/Kconfig >>> +++ b/drivers/clk/qcom/Kconfig >>> @@ -645,6 +645,16 @@ config SAR_GPUCC_2130P >>> Say Y if you want to support graphics controller devices and >>> functionality such as 3D graphics. >>> >>> +config SC_GCC_GLYMUR >> >> Wait, are we going back to this now? >> >> X Elite had CLK_X1E80100_GCC, so maybe this should be CLK_GLYMUR_GCC >> then. > > > Yeah, the SC is meaningless here, unless you call it CLK_SC8480XP_GCC, > so the authors need to decide on one naming. Not mixtures.. > > Glymur follows the "SC" naming convention, and historically we've adhered to the format: "SC/SM/SDX/SA__". This structure has helped maintain consistency and clarity across platforms. The case of X1E80100 appears to be an exception—likely influenced by its unique naming convention at the time. That said, I’d prefer to stay aligned with the established convention used for earlier chipsets to preserve continuity. I’d appreciate hearing your thoughts on this as well. -- Thanks, Taniya Das