From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99C5DEB64DD for ; Thu, 3 Aug 2023 17:19:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234149AbjHCRTa (ORCPT ); Thu, 3 Aug 2023 13:19:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232007AbjHCRT2 (ORCPT ); Thu, 3 Aug 2023 13:19:28 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E12853A97 for ; Thu, 3 Aug 2023 10:19:26 -0700 (PDT) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 373DlxuW002847; Thu, 3 Aug 2023 17:19:21 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=qcppdkim1; bh=QEZvBRN1XyEsnpHaGGxlfwRavP7wNOBkAxVCMZ+3ar8=; b=D9s93xL1QsCTTlWWYT7fNEiPIkz/NBU49ESnwWEYA9+VoUAPhgmGisjVLiDiDEKw/I9n A3lg6Dcn0U965uxTB9QH6n2pwPkyb2oZBBhN3uTc3I8PHs2LiW5DoRrbnuGF58TG63nk abVkKqiCsbLBtWbRFKrwE4bpzLLHDMOntAnzm3Ep69v12u6Cu5aCFPWHw9Y3tAFYiJtX jWtYdCQc4O7hATHyIWeog9+DfEu8xelEeWLcdxA62W4nZoE0NGEtWEm5uQ9rP6E5N2ff c+tuxUkO14XxM71PxR3B6UQwy4ilxBrpM25jolePcxk4hlJ5Hha4b3nrKnyvaZmaSlR9 Gw== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3s863a9mya-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 03 Aug 2023 17:19:21 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 373HJKnB001066 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 3 Aug 2023 17:19:20 GMT Received: from [10.71.109.168] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Thu, 3 Aug 2023 10:19:19 -0700 Message-ID: <2f9a9450-438b-257d-759c-22b273a7b35d@quicinc.com> Date: Thu, 3 Aug 2023 10:19:19 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] drm/panel: Add prepare_prev_first flag to Visionox VTDR6130 Content-Language: en-US To: , Sam Ravnborg , David Airlie , Daniel Vetter CC: , , , References: <20230725-visionox-vtdr-prev-first-v1-1-3bc44cec7dc6@quicinc.com> From: Jessica Zhang In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: w-mz3_XC9XVPkwtQe6UWiFT5QXyVIk73 X-Proofpoint-GUID: w-mz3_XC9XVPkwtQe6UWiFT5QXyVIk73 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-03_17,2023-08-03_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 phishscore=0 mlxscore=0 suspectscore=0 spamscore=0 priorityscore=1501 clxscore=1015 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308030155 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/31/2023 6:00 AM, Neil Armstrong wrote: > Hi, > > On 26/07/2023 00:56, Jessica Zhang wrote: >> Due to a recent introduction of the pre_enable_prev_first bridge flag >> [1], >> the panel driver will be probed before the DSI is enabled, causing the >> DCS commands to fail to send. >> >> Ensure that DSI is enabled before panel probe by setting the >> prepare_prev_first flag for the panel. > > Well this is specific to MSM DSI driver, it's not related at all to the > panel. Hi Neil, I think there might be some confusion caused by the commit message -- instead of "enabled before panel probe", it should be "enabled before panel pre_enable()" as the panel on commands are sent during prepare(), which is matched to bridge pre_enable(). IIRC the general rule is that the panel driver should set the prepare_prev_first flag if the on commands are sent during pre_enable(), so I'll keep the code change but correct the commit message if that's ok with you. Thanks, Jessica Zhang > > Neil > >> >> [1] commit 4fb912e5e190 ("drm/bridge: Introduce pre_enable_prev_first >> to alter bridge init order") >> >> Fixes: 2349183d32d8 ("drm/panel: add visionox vtdr6130 DSI panel driver") >> Signed-off-by: Jessica Zhang >> --- >>   drivers/gpu/drm/panel/panel-visionox-vtdr6130.c | 1 + >>   1 file changed, 1 insertion(+) >> >> diff --git a/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c >> b/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c >> index bb0dfd86ea67..e1363e128e7e 100644 >> --- a/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c >> +++ b/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c >> @@ -296,6 +296,7 @@ static int visionox_vtdr6130_probe(struct >> mipi_dsi_device *dsi) >>       dsi->format = MIPI_DSI_FMT_RGB888; >>       dsi->mode_flags = MIPI_DSI_MODE_VIDEO | >> MIPI_DSI_MODE_NO_EOT_PACKET | >>                 MIPI_DSI_CLOCK_NON_CONTINUOUS; >> +    ctx->panel.prepare_prev_first = true; >>       drm_panel_init(&ctx->panel, dev, &visionox_vtdr6130_panel_funcs, >>                  DRM_MODE_CONNECTOR_DSI); >> >> --- >> base-commit: 28a5c036b05fc5c935cc72d76abd3589825ea9cd >> change-id: 20230717-visionox-vtdr-prev-first-e00ae02eec9f >> >> Best regards, >