From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Xin Li <xin@zytor.com>, Sandipan Das <sandipan.das@amd.com>
Subject: Re: [PATCH 09/18] KVM: x86/pmu: Move kvm_init_pmu_capability() to pmu.c
Date: Wed, 6 Aug 2025 15:23:34 +0800 [thread overview]
Message-ID: <2fa1e68d-afbf-4aa4-99cb-b2001eb314de@linux.intel.com> (raw)
In-Reply-To: <20250805190526.1453366-10-seanjc@google.com>
On 8/6/2025 3:05 AM, Sean Christopherson wrote:
> Move kvm_init_pmu_capability() to pmu.c so that future changes can access
> variables that have no business being visible outside of pmu.c.
> kvm_init_pmu_capability() is called once per module load, there's is zero
> reason it needs to be inlined.
>
> No functional change intended.
>
> Cc: Dapeng Mi <dapeng1.mi@linux.intel.com>
> Cc: Sandipan Das <sandipan.das@amd.com>
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
> arch/x86/kvm/pmu.c | 47 ++++++++++++++++++++++++++++++++++++++++++++++
> arch/x86/kvm/pmu.h | 47 +---------------------------------------------
> 2 files changed, 48 insertions(+), 46 deletions(-)
>
> diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
> index 75e9cfc689f8..eb17d90916ea 100644
> --- a/arch/x86/kvm/pmu.c
> +++ b/arch/x86/kvm/pmu.c
> @@ -96,6 +96,53 @@ void kvm_pmu_ops_update(const struct kvm_pmu_ops *pmu_ops)
> #undef __KVM_X86_PMU_OP
> }
>
> +void kvm_init_pmu_capability(const struct kvm_pmu_ops *pmu_ops)
> +{
> + bool is_intel = boot_cpu_data.x86_vendor == X86_VENDOR_INTEL;
> + int min_nr_gp_ctrs = pmu_ops->MIN_NR_GP_COUNTERS;
> +
> + /*
> + * Hybrid PMUs don't play nice with virtualization without careful
> + * configuration by userspace, and KVM's APIs for reporting supported
> + * vPMU features do not account for hybrid PMUs. Disable vPMU support
> + * for hybrid PMUs until KVM gains a way to let userspace opt-in.
> + */
> + if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU))
> + enable_pmu = false;
> +
> + if (enable_pmu) {
> + perf_get_x86_pmu_capability(&kvm_pmu_cap);
> +
> + /*
> + * WARN if perf did NOT disable hardware PMU if the number of
> + * architecturally required GP counters aren't present, i.e. if
> + * there are a non-zero number of counters, but fewer than what
> + * is architecturally required.
> + */
> + if (!kvm_pmu_cap.num_counters_gp ||
> + WARN_ON_ONCE(kvm_pmu_cap.num_counters_gp < min_nr_gp_ctrs))
> + enable_pmu = false;
> + else if (is_intel && !kvm_pmu_cap.version)
> + enable_pmu = false;
> + }
> +
> + if (!enable_pmu) {
> + memset(&kvm_pmu_cap, 0, sizeof(kvm_pmu_cap));
> + return;
> + }
> +
> + kvm_pmu_cap.version = min(kvm_pmu_cap.version, 2);
> + kvm_pmu_cap.num_counters_gp = min(kvm_pmu_cap.num_counters_gp,
> + pmu_ops->MAX_NR_GP_COUNTERS);
> + kvm_pmu_cap.num_counters_fixed = min(kvm_pmu_cap.num_counters_fixed,
> + KVM_MAX_NR_FIXED_COUNTERS);
> +
> + kvm_pmu_eventsel.INSTRUCTIONS_RETIRED =
> + perf_get_hw_event_config(PERF_COUNT_HW_INSTRUCTIONS);
> + kvm_pmu_eventsel.BRANCH_INSTRUCTIONS_RETIRED =
> + perf_get_hw_event_config(PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
> +}
> +
> static inline void __kvm_perf_overflow(struct kvm_pmc *pmc, bool in_pmi)
> {
> struct kvm_pmu *pmu = pmc_to_pmu(pmc);
> diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h
> index ad89d0bd6005..13477066eb40 100644
> --- a/arch/x86/kvm/pmu.h
> +++ b/arch/x86/kvm/pmu.h
> @@ -180,52 +180,7 @@ static inline bool pmc_speculative_in_use(struct kvm_pmc *pmc)
> extern struct x86_pmu_capability kvm_pmu_cap;
> extern struct kvm_pmu_emulated_event_selectors kvm_pmu_eventsel;
>
> -static inline void kvm_init_pmu_capability(const struct kvm_pmu_ops *pmu_ops)
> -{
> - bool is_intel = boot_cpu_data.x86_vendor == X86_VENDOR_INTEL;
> - int min_nr_gp_ctrs = pmu_ops->MIN_NR_GP_COUNTERS;
> -
> - /*
> - * Hybrid PMUs don't play nice with virtualization without careful
> - * configuration by userspace, and KVM's APIs for reporting supported
> - * vPMU features do not account for hybrid PMUs. Disable vPMU support
> - * for hybrid PMUs until KVM gains a way to let userspace opt-in.
> - */
> - if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU))
> - enable_pmu = false;
> -
> - if (enable_pmu) {
> - perf_get_x86_pmu_capability(&kvm_pmu_cap);
> -
> - /*
> - * WARN if perf did NOT disable hardware PMU if the number of
> - * architecturally required GP counters aren't present, i.e. if
> - * there are a non-zero number of counters, but fewer than what
> - * is architecturally required.
> - */
> - if (!kvm_pmu_cap.num_counters_gp ||
> - WARN_ON_ONCE(kvm_pmu_cap.num_counters_gp < min_nr_gp_ctrs))
> - enable_pmu = false;
> - else if (is_intel && !kvm_pmu_cap.version)
> - enable_pmu = false;
> - }
> -
> - if (!enable_pmu) {
> - memset(&kvm_pmu_cap, 0, sizeof(kvm_pmu_cap));
> - return;
> - }
> -
> - kvm_pmu_cap.version = min(kvm_pmu_cap.version, 2);
> - kvm_pmu_cap.num_counters_gp = min(kvm_pmu_cap.num_counters_gp,
> - pmu_ops->MAX_NR_GP_COUNTERS);
> - kvm_pmu_cap.num_counters_fixed = min(kvm_pmu_cap.num_counters_fixed,
> - KVM_MAX_NR_FIXED_COUNTERS);
> -
> - kvm_pmu_eventsel.INSTRUCTIONS_RETIRED =
> - perf_get_hw_event_config(PERF_COUNT_HW_INSTRUCTIONS);
> - kvm_pmu_eventsel.BRANCH_INSTRUCTIONS_RETIRED =
> - perf_get_hw_event_config(PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
> -}
> +void kvm_init_pmu_capability(const struct kvm_pmu_ops *pmu_ops);
>
> static inline void kvm_pmu_request_counter_reprogram(struct kvm_pmc *pmc)
> {
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
next prev parent reply other threads:[~2025-08-06 7:23 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-05 19:05 [PATCH 00/18] KVM: x86: Fastpath cleanups and PMU prep work Sean Christopherson
2025-08-05 19:05 ` [PATCH 01/18] KVM: SVM: Skip fastpath emulation on VM-Exit if next RIP isn't valid Sean Christopherson
2025-08-05 19:05 ` [PATCH 02/18] KVM: x86: Add kvm_icr_to_lapic_irq() helper to allow for fastpath IPIs Sean Christopherson
2025-08-05 19:05 ` [PATCH 03/18] KVM: x86: Only allow "fast" IPIs in fastpath WRMSR(X2APIC_ICR) handler Sean Christopherson
2025-08-05 19:05 ` [PATCH 04/18] KVM: x86: Drop semi-arbitrary restrictions on IPI type in fastpath Sean Christopherson
2025-08-05 19:05 ` [PATCH 05/18] KVM: x86: Unconditionally handle MSR_IA32_TSC_DEADLINE in fastpath exits Sean Christopherson
2025-08-06 17:42 ` Sean Christopherson
2025-08-05 19:05 ` [PATCH 06/18] KVM: x86: Acquire SRCU in WRMSR fastpath iff instruction needs to be skipped Sean Christopherson
2025-08-05 19:05 ` [PATCH 07/18] KVM: x86: Unconditionally grab data from EDX:EAX in WRMSR fastpath Sean Christopherson
2025-08-05 19:05 ` [PATCH 08/18] KVM: x86: Fold WRMSR fastpath helpers into the main handler Sean Christopherson
2025-08-05 19:05 ` [PATCH 09/18] KVM: x86/pmu: Move kvm_init_pmu_capability() to pmu.c Sean Christopherson
2025-08-06 7:23 ` Mi, Dapeng [this message]
2025-08-05 19:05 ` [PATCH 10/18] KVM: x86/pmu: Add wrappers for counting emulated instructions/branches Sean Christopherson
2025-08-06 7:25 ` Mi, Dapeng
2025-08-05 19:05 ` [PATCH 11/18] KVM: x86/pmu: Calculate set of to-be-emulated PMCs at time of WRMSRs Sean Christopherson
2025-08-06 7:28 ` Mi, Dapeng
2025-08-05 19:05 ` [PATCH 12/18] KVM: x86/pmu: Rename pmc_speculative_in_use() to pmc_is_locally_enabled() Sean Christopherson
2025-08-06 7:28 ` Mi, Dapeng
2025-08-05 19:05 ` [PATCH 13/18] KVM: x86/pmu: Open code pmc_event_is_allowed() in its callers Sean Christopherson
2025-08-06 7:30 ` Mi, Dapeng
2025-08-05 19:05 ` [PATCH 14/18] KVM: x86/pmu: Drop redundant check on PMC being globally enabled for emulation Sean Christopherson
2025-08-06 7:32 ` Mi, Dapeng
2025-08-05 19:05 ` [PATCH 15/18] KVM: x86/pmu: Drop redundant check on PMC being locally " Sean Christopherson
2025-08-06 7:33 ` Mi, Dapeng
2025-08-05 19:05 ` [PATCH 16/18] KVM: x86/pmu: Rename check_pmu_event_filter() to pmc_is_event_allowed() Sean Christopherson
2025-08-06 7:35 ` Mi, Dapeng
2025-08-05 19:05 ` [PATCH 17/18] KVM: x86: Push acquisition of SRCU in fastpath into kvm_pmu_trigger_event() Sean Christopherson
2025-08-06 8:08 ` Mi, Dapeng
2025-08-06 17:33 ` Sean Christopherson
2025-08-07 2:24 ` Mi, Dapeng
2025-08-07 13:31 ` Sean Christopherson
2025-08-08 0:42 ` Mi, Dapeng
2025-08-05 19:05 ` [PATCH 18/18] KVM: x86: Add a fastpath handler for INVD Sean Christopherson
2025-08-06 8:11 ` [PATCH 00/18] KVM: x86: Fastpath cleanups and PMU prep work Mi, Dapeng
2025-08-07 6:23 ` Sandipan Das
2025-08-19 23:11 ` Sean Christopherson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2fa1e68d-afbf-4aa4-99cb-b2001eb314de@linux.intel.com \
--to=dapeng1.mi@linux.intel.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=sandipan.das@amd.com \
--cc=seanjc@google.com \
--cc=xin@zytor.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®